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065e60503f
unicorn/qemu/target
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Peter Maydell 065e60503f
target/arm: Handle floating point registers in exception entry 
Handle floating point registers in exception entry.
This corresponds to the FP-specific parts of the pseudocode
functions ActivateException() and PushStack().

We defer the code corresponding to UpdateFPCCR() to a later patch.

Backports commit 0ed377a8013f40653a83f6ad2c9693897522d7dc from qemu
2019-04-30 10:25:23 -04:00
..
arm target/arm: Handle floating point registers in exception entry 2019-04-30 10:25:23 -04:00
i386 tcg: Hoist max_insns computation to tb_gen_code 2019-04-30 09:49:57 -04:00
m68k tcg: Hoist max_insns computation to tb_gen_code 2019-04-30 09:49:57 -04:00
mips tcg: Hoist max_insns computation to tb_gen_code 2019-04-30 09:49:57 -04:00
riscv tcg: Hoist max_insns computation to tb_gen_code 2019-04-30 09:49:57 -04:00
sparc tcg: Hoist max_insns computation to tb_gen_code 2019-04-30 09:49:57 -04:00