unicorn/qemu
James Hogan 0afa0c8ddc
target/mips: Use BS_EXCP where interrupts are expected
Commit e350d8ca3ac7 ("target/mips: optimize indirect branches") made
indirect branches able to directly find the next TB and jump straight to
it without breaking out of translated code and going around the main
execution loop. This breaks the assumption in target/mips/translate.c
that BS_STOP is sufficient to cause pending interrupts to be handled,
since interrupts are only checked in the main loop.

Fix a few of these assumptions by using gen_save_pc to update the saved
PC and using BS_EXCP instead of BS_STOP:

- [D]MFC0 CP0_Count may trigger a timer interrupt which should be
immediately handled.

- [D]MTC0 CP0_Cause may trigger an interrupt (but in fact translation
was only even being stopped in the DMTC0 case).

- [D]MTC0 CP0_<any> when icount is used is assumed could potentially
cause interrupts.

- EI may trigger an interrupt which was pending. I specifically hit
this case when running KVM nested in mipsel-softmmu. A timer
interrupt while the 2nd guest was executing is caught by KVM which
switches back to the normal Linux exception base and re-enables
interrupts with EI. Since the above commit QEMU doesn't leave
translated code until the nested KVM has already restored the KVM
exception base and returned to the 2nd guest, at which point it is
too late to check for pending interrupts and it gets stuck in an
infinite loop of unhandled interrupts.

Something similar was needed for ARM in commit b29fd33db578
("target/arm: use DISAS_EXIT for eret handling").

Backports commit b74cddcbf6063f684725e3f8bca49a68e30cba71 from qemu
2018-03-04 01:32:24 -05:00
..
crypto
default-configs
docs
fpu softfloat: define floatx80_round() 2018-03-03 20:57:27 -05:00
hw
include tcg: Pass generic CPUState to gen_intermediate_code() 2018-03-03 23:34:18 -05:00
qapi qapi: add explicit null to string input and output visitors 2018-03-03 20:32:50 -05:00
qobject qnum: add uint type 2018-03-03 18:37:56 -05:00
qom qom: Fix ambiguous path detection when ambiguous=NULL 2018-03-03 22:49:21 -05:00
scripts scripts: use build_ prefix for string not piped through cgen() 2018-03-03 22:11:28 -05:00
target target/mips: Use BS_EXCP where interrupts are expected 2018-03-04 01:32:24 -05:00
tcg tcg/mips: reserve a register for the guest_base. 2018-03-03 23:04:55 -05:00
util util/cacheinfo: Add missing include for ppc linux 2018-03-03 23:05:44 -05:00
aarch64.h memory: Rename memory_region_init_rom() and _rom_device() to _nomigrate() 2018-03-03 22:29:01 -05:00
aarch64eb.h memory: Rename memory_region_init_rom() and _rom_device() to _nomigrate() 2018-03-03 22:29:01 -05:00
accel.c
arm.h memory: Rename memory_region_init_rom() and _rom_device() to _nomigrate() 2018-03-03 22:29:01 -05:00
armeb.h memory: Rename memory_region_init_rom() and _rom_device() to _nomigrate() 2018-03-03 22:29:01 -05:00
atomic_template.h
CODING_STYLE
configure build: add -Wexpansion-to-defined 2018-03-03 22:12:31 -05:00
COPYING
COPYING.LIB
cpu-exec-common.c
cpu-exec.c tcg: Introduce goto_ptr opcode and tcg_gen_lookup_and_goto_ptr 2018-03-02 21:05:18 -05:00
cpus.c
cputlb.c tcg: consistently access cpu->tb_jmp_cache atomically 2018-03-03 21:12:36 -05:00
exec.c exec: Add lock parameter to qemu_ram_ptr_length 2018-03-04 01:23:14 -05:00
gen_all_header.sh
glib_compat.c
HACKING
header_gen.py target/mips: Add segmentation control registers 2018-03-04 01:00:42 -05:00
ioport.c
LICENSE
m68k.h memory: Rename memory_region_init_rom() and _rom_device() to _nomigrate() 2018-03-03 22:29:01 -05:00
Makefile
Makefile.objs
Makefile.target tcg: add the CONFIG_TCG into Makefiles 2018-03-03 21:39:30 -05:00
memory_ldst.inc.c
memory_mapping.c
memory.c memory: Rename memory_region_init_rom() and _rom_device() to _nomigrate() 2018-03-03 22:29:01 -05:00
mips64.h target/mips: Add segmentation control registers 2018-03-04 01:00:42 -05:00
mips64el.h target/mips: Add segmentation control registers 2018-03-04 01:00:42 -05:00
mips.h target/mips: Add segmentation control registers 2018-03-04 01:00:42 -05:00
mipsel.h target/mips: Add segmentation control registers 2018-03-04 01:00:42 -05:00
powerpc.h memory: Rename memory_region_init_rom() and _rom_device() to _nomigrate() 2018-03-03 22:29:01 -05:00
qapi-schema.json qapi: Update scripts to commit 01b2ffcedd94ad7b42bc870e4c6936c87ad03429 2018-03-03 18:32:12 -05:00
qemu-timer.c
rules.mak
softmmu_template.h
sparc64.h memory: Rename memory_region_init_rom() and _rom_device() to _nomigrate() 2018-03-03 22:29:01 -05:00
sparc.h memory: Rename memory_region_init_rom() and _rom_device() to _nomigrate() 2018-03-03 22:29:01 -05:00
tcg-runtime.c tcg: Increase hit rate of lookup_tb_ptr 2018-03-03 17:16:23 -05:00
translate-all.c tcg: Pass generic CPUState to gen_intermediate_code() 2018-03-03 23:34:18 -05:00
translate-all.h
translate-common.c
unicorn_common.h
VERSION
vl.c util: add cacheinfo 2018-03-03 16:58:28 -05:00
vl.h
x86_64.h memory: Rename memory_region_init_rom() and _rom_device() to _nomigrate() 2018-03-03 22:29:01 -05:00