Bastian Koppelmann 1024ceb4df target/riscv: Convert RV64I load/store insns to decodetree ... this splits the 64-bit only instructions into its own decode file such that we generate the decoder for these instructions only for the RISC-V 64 bit target. Backports commit 7e45a682edc32ba90d6955215f062210531b835b from qemu		2019-03-18 16:02:16 -04:00
..
accel	cputlb: update TLB entry/index after tlb_fill	2019-02-12 11:48:48 -05:00
crypto
default-configs	target/riscv: Initial introduction of the RISC-V target	2019-03-08 21:46:10 -05:00
docs
fpu	qemu/fpu: Synchronize with Qemu	2019-03-09 18:27:31 -05:00
hw	target/riscv: Initial introduction of the RISC-V target	2019-03-08 21:46:10 -05:00
include	qemu/fpu: Synchronize with Qemu	2019-03-09 18:27:31 -05:00
qapi	qapi: Rewrite string-input-visitor's integer and list parsing	2018-12-18 04:57:25 -05:00
qobject
qom	qom/cpu: Add cluster_index to CPUState	2019-01-30 12:59:59 -05:00
scripts	decodetree: Properly diagnose fields overflowing an insn	2019-03-13 11:21:04 -04:00
target	target/riscv: Convert RV64I load/store insns to decodetree	2019-03-18 16:02:16 -04:00
tcg	target/riscv: Initial introduction of the RISC-V target	2019-03-08 21:46:10 -05:00
util	mmap-alloc: fix hugetlbfs misaligned length in ppc64	2019-02-05 16:52:39 -05:00
aarch64.h	qemu/fpu: Synchronize with Qemu	2019-03-09 18:27:31 -05:00
aarch64eb.h	qemu/fpu: Synchronize with Qemu	2019-03-09 18:27:31 -05:00
accel.c
arm.h	qemu/fpu: Synchronize with Qemu	2019-03-09 18:27:31 -05:00
armeb.h	qemu/fpu: Synchronize with Qemu	2019-03-09 18:27:31 -05:00
CODING_STYLE
configure	configure: Disable W^X on OpenBSD	2019-03-11 16:46:52 -04:00
COPYING
COPYING.LIB
cpus.c
exec.c	exec.c: refactor function flatview_add_to_dispatch()	2019-03-11 17:00:46 -04:00
gen_all_header.sh
glib_compat.c	target/arm: expose remaining CPUID registers as RAZ	2019-02-15 17:48:37 -05:00
HACKING
header_gen.py	target/riscv: Activate decodetree and implemnt LUI & AUIPC	2019-03-18 15:54:17 -04:00
ioport.c
LICENSE
m68k.h	qemu/fpu: Synchronize with Qemu	2019-03-09 18:27:31 -05:00
Makefile
Makefile.objs
Makefile.target
memory_ldst.inc.c	exec: Fix MAP_RAM for cached access	2018-07-03 01:11:12 -04:00
memory_mapping.c	include/qemu/osdep.h: Don't include qapi/error.h	2018-02-21 23:08:18 -05:00
memory.c
mips64.h	qemu/fpu: Synchronize with Qemu	2019-03-09 18:27:31 -05:00
mips64el.h	qemu/fpu: Synchronize with Qemu	2019-03-09 18:27:31 -05:00
mips.h	qemu/fpu: Synchronize with Qemu	2019-03-09 18:27:31 -05:00
mipsel.h	qemu/fpu: Synchronize with Qemu	2019-03-09 18:27:31 -05:00
powerpc.h	qemu/fpu: Synchronize with Qemu	2019-03-09 18:27:31 -05:00
qemu-timer.c
riscv32.h	target/riscv: Activate decodetree and implemnt LUI & AUIPC	2019-03-18 15:54:17 -04:00
riscv64.h	target/riscv: Activate decodetree and implemnt LUI & AUIPC	2019-03-18 15:54:17 -04:00
rules.mak
sparc64.h	qemu/fpu: Synchronize with Qemu	2019-03-09 18:27:31 -05:00
sparc.h	qemu/fpu: Synchronize with Qemu	2019-03-09 18:27:31 -05:00
unicorn_common.h
VERSION
vl.c
vl.h
x86_64.h	qemu/fpu: Synchronize with Qemu	2019-03-09 18:27:31 -05:00