Laurent Vivier 12cb26ab6c m68k: is_mem is useless ... Remove is_mem as it is never tested anymore since: commit bfa50bc2638d877cf2900712b7503be22e8811cb Backports commit 805167adcb900fa7b2b114d639c418f5313d0b42 from qemu		2018-02-17 15:23:13 -05:00
..
default-configs
docs	docs: clarify memory region lifecycle	2018-02-12 15:11:21 -05:00
fpu	softfloat: expand out STATUS macro	2018-02-12 13:43:13 -05:00
hw	qerror: Clean up QERR_ macros to expand into a single string	2018-02-17 15:23:09 -05:00
include	qerror: Move #include out of qerror.h	2018-02-17 15:23:10 -05:00
qapi	qerror: Clean up QERR_ macros to expand into a single string	2018-02-17 15:23:09 -05:00
qobject	qerror: Finally unused, clean up	2018-02-17 15:23:10 -05:00
qom	qerror: Clean up QERR_ macros to expand into a single string	2018-02-17 15:23:09 -05:00
scripts
target-arm	target-arm: A64: Print ELR when taking exceptions	2018-02-17 15:23:13 -05:00
target-i386	qerror: Clean up QERR_ macros to expand into a single string	2018-02-17 15:23:09 -05:00
target-m68k	m68k: is_mem is useless	2018-02-17 15:23:13 -05:00
target-mips	target-mips: add mips32r6-generic CPU definition	2018-02-17 15:23:13 -05:00
target-sparc
tcg	tcg: add TCG_TARGET_TLB_DISPLACEMENT_BITS	2018-02-13 08:28:29 -05:00
util	bitmap: add atomic test and clear	2018-02-13 10:02:12 -05:00
aarch64.h	target-mips: Misaligned memory accesses for MSA	2018-02-13 13:27:31 -05:00
aarch64eb.h	target-mips: Misaligned memory accesses for MSA	2018-02-13 13:27:31 -05:00
accel.c
arm.h	target-mips: Misaligned memory accesses for MSA	2018-02-13 13:27:31 -05:00
armeb.h	target-mips: Misaligned memory accesses for MSA	2018-02-13 13:27:31 -05:00
CODING_STYLE
configure
COPYING
COPYING.LIB
cpu-exec.c	exec: make iotlb RCU-friendly	2018-02-12 15:20:39 -05:00
cpus.c
cputlb.c	memory: replace cpu_physical_memory_reset_dirty() with test-and-clear	2018-02-13 11:25:45 -05:00
exec.c	memory: replace cpu_physical_memory_reset_dirty() with test-and-clear	2018-02-13 11:25:45 -05:00
gen_all_header.sh
glib_compat.c
HACKING
header_gen.py	target-mips: add ERETNC instruction and Config5.LLB bit	2018-02-13 13:33:37 -05:00
ioport.c	memory: Define API for MemoryRegionOps to take attrs and return status	2018-02-12 17:17:27 -05:00
LICENSE
m68k.h	target-mips: Misaligned memory accesses for MSA	2018-02-13 13:27:31 -05:00
Makefile
Makefile.objs
Makefile.target
memory_mapping.c
memory.c	memory: use mr->ram_addr in "is this RAM?" assertions	2018-02-13 11:31:02 -05:00
mips64.h	target-mips: add ERETNC instruction and Config5.LLB bit	2018-02-13 13:33:37 -05:00
mips64el.h	target-mips: add ERETNC instruction and Config5.LLB bit	2018-02-13 13:33:37 -05:00
mips.h	target-mips: add ERETNC instruction and Config5.LLB bit	2018-02-13 13:33:37 -05:00
mipsel.h	target-mips: add ERETNC instruction and Config5.LLB bit	2018-02-13 13:33:37 -05:00
powerpc.h	target-mips: Misaligned memory accesses for MSA	2018-02-13 13:27:31 -05:00
qapi-schema.json
qemu-log.c
qemu-timer.c
rules.mak
softmmu_template.h	Add MemTxAttrs to the IOTLB	2018-02-12 18:38:38 -05:00
sparc64.h	target-mips: Misaligned memory accesses for MSA	2018-02-13 13:27:31 -05:00
sparc.h	target-mips: Misaligned memory accesses for MSA	2018-02-13 13:27:31 -05:00
tcg-runtime.c
translate-all.c	translate-all: fix watchpoints if retranslation not possible	2018-02-17 15:22:43 -05:00
translate-all.h	translate-all: remove unnecessary argument to tb_invalidate_phys_range	2018-02-13 09:04:51 -05:00
unicorn_common.h
VERSION
vl.c
vl.h
x86_64.h	target-mips: Misaligned memory accesses for MSA	2018-02-13 13:27:31 -05:00