Stefan Markovic 2389a5468c target/mips: Prevent switching mode related to Config3 ISA bit for nanoMIPS ... Only if Config3.ISA is 3 (microMIPS), the mode should be switched in cpu_state_reset(). Config3.ISA is 1 for nanoMIPS processors, and no mode change should happen. Backports commit 0bbc0396809f6caaaf96863dafe738e94f9b73ea from qemu		2018-08-27 04:15:31 -04:00
..
cp0_timer.c	mips: introduce internal.h and cleanup cpu.h	2018-03-05 00:25:56 -05:00
cpu-qom.h	mips: MIPSCPU model subclasses	2018-03-05 00:42:29 -05:00
cpu.c	cpu: Add Error argument to cpu_exec_init()	2018-03-21 07:50:33 -04:00
cpu.h	target/mips: Add CP0 BadInstrX register	2018-08-17 14:22:02 -04:00
dsp_helper.c	mips: Improve macro parenthesization	2018-03-05 00:51:51 -05:00
helper.c	target/mips: Don't update BadVAddr register in Debug Mode	2018-08-17 14:24:19 -04:00
helper.h	target/mips: Add segmentation control registers	2018-03-04 01:00:42 -05:00
internal.h	target/mips/internal: Perform comparison pass with qemu	2018-03-12 15:13:17 -04:00
lmi_helper.c
Makefile.objs	mips: introduce internal.h and cleanup cpu.h	2018-03-05 00:25:56 -05:00
mips-defs.h	target/mips: Add preprocessor constants for nanoMIPS	2018-08-27 04:11:21 -04:00
msa_helper.c	target/mips: Remove floatX_maybe_silence_nan from conversions	2018-05-19 23:25:04 -04:00
op_helper.c	target/mips: Raise a RI when given fs is n/a from CTC1	2018-07-03 00:57:09 -04:00
TODO
translate_init.c	target/mips/translate: Perform comparison pass with qemu	2018-03-12 17:52:56 -04:00
translate.c	target/mips: Prevent switching mode related to Config3 ISA bit for nanoMIPS	2018-08-27 04:15:31 -04:00
unicorn.c	Use DEFINE_MACHINE() to register all machines	2018-03-11 15:12:46 -04:00
unicorn.h