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https://github.com/yuzu-emu/unicorn.git
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47150b6df3
* reg_read and reg_write now work with registers W0 through W30 in Aarch64 emulaton * Added a regress test for the ARM64 reg_read and reg_write on 32-bit registers (W0-W30) Added a new macro in uc_priv.h (WRITE_DWORD_TO_QWORD), in order to write to the lower 32 bits of a 64 bit value without overwriting the whole value when using reg_write * Fixed WRITE_DWORD macro reg_write would zero out the high order bits when writing to 32 bit registers e.g. uc.reg_write(UC_X86_REG_EAX, 0) would also set register RAX to zero
31 lines
951 B
Python
31 lines
951 B
Python
#!/usr/bin/python
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from unicorn import *
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from unicorn.arm64_const import *
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from unicorn.x86_const import *
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import regress
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class Arm64RegReadWriteW0ThroughW30(regress.RegressTest):
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"""
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Testing the functionality to read/write 32-bit registers in AArch64
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See issue #716
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"""
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def runTest(self):
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uc = Uc(UC_ARCH_ARM64, UC_MODE_ARM)
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uc.reg_write(UC_ARM64_REG_X0, 0x1234567890abcdef)
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self.assertEquals(uc.reg_read(UC_ARM64_REG_X0), 0x1234567890abcdef)
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self.assertEquals(uc.reg_read(UC_ARM64_REG_W0), 0x90abcdef)
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uc.reg_write(UC_ARM64_REG_X30, 0xa1b2c3d4e5f6a7b8)
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self.assertEquals(uc.reg_read(UC_ARM64_REG_W30), 0xe5f6a7b8)
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uc.reg_write(UC_ARM64_REG_W30, 0xaabbccdd)
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self.assertEquals(uc.reg_read(UC_ARM64_REG_X30), 0xa1b2c3d4aabbccdd)
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self.assertEquals(uc.reg_read(UC_ARM64_REG_W30), 0xaabbccdd)
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if __name__ == '__main__':
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regress.main()
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