unicorn/qemu/target-mips
Aurelien Jarno 2e8c6adc4b
target-mips: silence NaNs for cvt.s.d and cvt.d.s
cvt.s.d and cvt.d.s are FP operations and thus need to convert input
sNaN into corresponding qNaN. Explicitely use the floatXX_maybe_silence_nan
functions for that as the floatXX_to_floatXX functions do not do that.

Backports commit 1aa56f6ee7d2375b0734e98ba69cc41416894bbc from qemu
2018-02-19 00:40:29 -05:00
..
cpu-qom.h remove slow cpu QOM casts (#815) 2017-05-02 14:56:39 +08:00
cpu.c target-mips: implement the CPU wake-up on non-enabled interrupts in R6 2018-02-17 15:24:12 -05:00
cpu.h target-mips/cpu.h: Fix spell error 2018-02-19 00:38:27 -05:00
dsp_helper.c Added MIPS support and projects for all samples. 2017-01-23 01:05:08 +11:00
helper.c target-mips: Fix exceptions while UX=0 2018-02-17 18:57:52 -05:00
helper.h target-mips: add PC, XNP reg numbers to RDHWR 2018-02-17 15:24:13 -05:00
lmi_helper.c import 2015-08-21 15:04:50 +08:00
Makefile.objs import 2015-08-21 15:04:50 +08:00
mips-defs.h target-mips: fix MIPS64R6-generic configuration 2018-02-17 15:23:21 -05:00
msa_helper.c fpu: Replace int32 typedef with int32_t 2018-02-19 00:24:56 -05:00
op_helper.c target-mips: silence NaNs for cvt.s.d and cvt.d.s 2018-02-19 00:40:29 -05:00
TODO import 2015-08-21 15:04:50 +08:00
translate_init.c target-mips: Set Config5.XNP for R6 cores 2018-02-17 15:24:13 -05:00
translate.c target-mips: add SIGRIE instruction 2018-02-17 15:24:13 -05:00
unicorn.c Merge branch 'master' into msvc2 2017-04-21 01:17:00 +08:00
unicorn.h armeb: rename arm's and mips's *REGS_STORAGE_SIZE to avoid big-endian and little-endian's duplicated definition. 2017-03-15 22:25:35 +08:00