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2ed6459e98
unicorn/qemu
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Alistair Francis 2ed6459e98
target/riscv: Add the mcountinhibit CSR 
1.11 defines mcountinhibit, which has the same numeric CSR value as
mucounteren from 1.09.1 but has different semantics. This patch enables
the CSR for 1.11-based targets, which is trivial to implement because
the counters in QEMU never tick (legal according to the spec).

Backports commit 747a43e818dc36bd50ef98c2b11a7c31ceb810fa from qemu
2019-08-08 17:04:52 -04:00
..
accel Revert "cputlb: Filter flushes on already clean tlbs" 2019-06-30 19:21:20 -04:00
crypto
default-configs target/riscv: Initial introduction of the RISC-V target 2019-03-08 21:46:10 -05:00
docs
fpu qemu/fpu: Synchronize with Qemu 2019-03-09 18:27:31 -05:00
hw target/i386: Use env_cpu, env_archcpu 2019-06-12 11:46:35 -04:00
include Revert "cputlb: Filter flushes on already clean tlbs" 2019-06-30 19:21:20 -04:00
qapi qapi: Rewrite string-input-visitor's integer and list parsing 2018-12-18 04:57:25 -05:00
qobject
qom cpu: Move icount_decr to CPUNegativeOffsetState 2019-06-13 15:34:28 -04:00
scripts decodetree: Fix comparison of Field 2019-06-13 16:17:56 -04:00
target target/riscv: Add the mcountinhibit CSR 2019-08-08 17:04:52 -04:00
tcg cpu: Move icount_decr to CPUNegativeOffsetState 2019-06-13 15:34:28 -04:00
util util/cacheinfo: Use uint64_t on LLP64 model to satisfy Windows ARM64 2019-05-09 17:43:27 -04:00
aarch64.h target/arm: Declare some M-profile functions publicly 2019-08-08 15:37:01 -04:00
aarch64eb.h target/arm: Declare some M-profile functions publicly 2019-08-08 15:37:01 -04:00
accel.c
arm.h target/arm: Declare some M-profile functions publicly 2019-08-08 15:37:01 -04:00
armeb.h target/arm: Declare some M-profile functions publicly 2019-08-08 15:37:01 -04:00
CODING_STYLE
configure configure: disallow spaces and colons in source path and build path 2019-08-08 14:29:24 -04:00
COPYING
COPYING.LIB
cpus.c
exec.c exec.c: refactor function flatview_add_to_dispatch() 2019-03-11 17:00:46 -04:00
gen_all_header.sh
glib_compat.c target/arm/translate: Synchronize with Qemu 2019-04-27 10:13:01 -04:00
HACKING
header_gen.py target/riscv: Implement riscv_cpu_unassigned_access 2019-08-08 16:48:02 -04:00
ioport.c
LICENSE
m68k.h tcg: Add support for vector compare select 2019-05-24 18:21:13 -04:00
Makefile configure: disallow spaces and colons in source path and build path 2019-08-08 14:29:24 -04:00
Makefile.objs
Makefile.target
memory_ldst.inc.c
memory_mapping.c
memory.c cputlb: Synchronize with qemu 2019-04-26 15:48:45 -04:00
mips64.h target/mips: Refactor and fix INSERT.<B|H|W|D> instructions 2019-05-28 19:42:28 -04:00
mips64el.h target/mips: Refactor and fix INSERT.<B|H|W|D> instructions 2019-05-28 19:42:28 -04:00
mips.h target/mips: Refactor and fix INSERT.<B|H|W|D> instructions 2019-05-28 19:42:28 -04:00
mipsel.h target/mips: Refactor and fix INSERT.<B|H|W|D> instructions 2019-05-28 19:42:28 -04:00
powerpc.h tcg: Add support for vector compare select 2019-05-24 18:21:13 -04:00
qemu-timer.c
riscv32.h target/riscv: Implement riscv_cpu_unassigned_access 2019-08-08 16:48:02 -04:00
riscv64.h target/riscv: Implement riscv_cpu_unassigned_access 2019-08-08 16:48:02 -04:00
rules.mak
sparc64.h tcg: Add support for vector compare select 2019-05-24 18:21:13 -04:00
sparc.h tcg: Add support for vector compare select 2019-05-24 18:21:13 -04:00
unicorn_common.h
VERSION Open 4.1 development tree 2019-04-24 11:59:00 -04:00
vl.c
vl.h
x86_64.h tcg: Add support for vector compare select 2019-05-24 18:21:13 -04:00