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https://github.com/yuzu-emu/unicorn.git
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2769c6ada0
The v7m CONTROL register bit 1 is SPSEL, which indicates the stack being used. We were storing this information not in v7m.control but in the separate v7m.other_sp structure field. Unfortunately, the code handling reads of the CONTROL register didn't take account of this, and so if SPSEL was updated by an exception entry or exit then a subsequent guest read of CONTROL would get the wrong value. Using a separate structure field doesn't really gain us anything in efficiency, so drop this unnecessary complexity in favour of simply storing all the bits in v7m.control. This is a migration compatibility break for M profile CPUs only. Backports commit abc24d86cc0364f402e438fae3acb14289b40734 from qemu
74 lines
3.3 KiB
C
74 lines
3.3 KiB
C
/*
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* Register Definition API: field macros
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*
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* Copyright (c) 2016 Xilinx Inc.
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* Copyright (c) 2013 Peter Crosthwaite <peter.crosthwaite@xilinx.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2. See
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* the COPYING file in the top-level directory.
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*/
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#ifndef REGISTERFIELDS_H
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#define REGISTERFIELDS_H
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#include "qemu/bitops.h"
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/* Define constants for a 32 bit register */
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/* This macro will define A_FOO, for the byte address of a register
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* as well as R_FOO for the uint32_t[] register number (A_FOO / 4).
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*/
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#define REG32(reg, addr) \
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enum { A_ ## reg = (addr) }; \
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enum { R_ ## reg = (addr) / 4 };
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/* Define SHIFT, LENGTH and MASK constants for a field within a register */
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/* This macro will define R_FOO_BAR_MASK, R_FOO_BAR_SHIFT and R_FOO_BAR_LENGTH
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* constants for field BAR in register FOO.
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*/
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#define FIELD(reg, field, shift, length) \
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enum { R_ ## reg ## _ ## field ## _SHIFT = (shift)}; \
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enum { R_ ## reg ## _ ## field ## _LENGTH = (length)}; \
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enum { R_ ## reg ## _ ## field ## _MASK = \
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MAKE_64BIT_MASK(shift, length)};
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/* Extract a field from a register */
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#define FIELD_EX32(storage, reg, field) \
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extract32((storage), R_ ## reg ## _ ## field ## _SHIFT, \
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R_ ## reg ## _ ## field ## _LENGTH)
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#define FIELD_EX64(storage, reg, field) \
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extract64((storage), R_ ## reg ## _ ## field ## _SHIFT, \
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R_ ## reg ## _ ## field ## _LENGTH)
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/* Extract a field from an array of registers */
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#define ARRAY_FIELD_EX32(regs, reg, field) \
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FIELD_EX32((regs)[R_ ## reg], reg, field)
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/* Deposit a register field.
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* Assigning values larger then the target field will result in
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* compilation warnings.
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*/
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#define FIELD_DP32(storage, reg, field, val) ({ \
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struct { \
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unsigned int v:R_ ## reg ## _ ## field ## _LENGTH; \
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} v = { val }; \
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uint32_t d; \
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d = deposit32((storage), R_ ## reg ## _ ## field ## _SHIFT, \
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R_ ## reg ## _ ## field ## _LENGTH, v.v); \
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d; })
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#define FIELD_DP64(storage, reg, field, val) ({ \
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struct { \
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unsigned int v:R_ ## reg ## _ ## field ## _LENGTH; \
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} v = { val }; \
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uint64_t d; \
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d = deposit64((storage), R_ ## reg ## _ ## field ## _SHIFT, \
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R_ ## reg ## _ ## field ## _LENGTH, v.v); \
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d; })
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/* Deposit a field to array of registers. */
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#define ARRAY_FIELD_DP32(regs, reg, field, val) \
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(regs)[R_ ## reg] = FIELD_DP32((regs)[R_ ## reg], reg, field, val);
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#endif
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