Peter Maydell 31813bafe2 target/arm: Implement HACR_EL2 ... HACR_EL2 is a register with IMPDEF behaviour, which allows implementation specific trapping to EL2. Implement it as RAZ/WI, since QEMU's implementation has no extra traps. This also matches what h/w implementations like Cortex-A53 and A57 do. Backports commit 831a2fca343ebcd6651eab9102bd7a36b77da65d from qemu		2019-02-15 17:15:41 -05:00
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arm	target/arm: Implement HACR_EL2	2019-02-15 17:15:41 -05:00
i386	Revert "i386: Add CPUID bit for PCONFIG"	2019-02-07 08:56:40 -05:00
m68k	target/m68k: Fix LGPL information in the file headers	2019-02-03 17:55:29 -05:00
mips	target/mips: reimplement SC instruction emulation and use cmpxchg	2019-02-15 17:10:16 -05:00
sparc	target: Resolve repeated typedef warnings	2019-01-22 20:27:35 -05:00