unicorn/qemu/target/arm
Richard Henderson 3183349f1c target/arm: Use bit 55 explicitly for pauth
The psuedocode in aarch64/functions/pac/auth/Auth and
aarch64/functions/pac/strip/Strip always uses bit 55 for
extfield and do not consider if the current regime has 2 ranges.

Backports commit 7eeb4c2ce8dc0a5655526f3f39bd5d6cc02efb39 from qemu
2020-03-21 17:59:06 -04:00
..
a32-uncond.decode target/arm: Convert Unallocated memory hint 2019-11-28 02:47:41 -05:00
a32.decode target/arm: Convert SVC 2019-11-28 02:46:55 -05:00
arm_ldst.h
arm-powerctl.c arm/arm-powerctl: set NSACR.{CP11, CP10} bits in arm_set_cpu_on() 2020-01-07 18:10:29 -05:00
arm-powerctl.h
cpu64.c target/arm: Implement ARMv8.1-VMID16 extension 2020-03-21 17:52:43 -04:00
cpu-param.h target/arm: Add mmu_idx for EL1 and EL2 w/ PAN enabled 2020-03-21 17:12:16 -04:00
cpu-qom.h target/arm: Add the hypervisor virtual counter 2020-03-21 15:35:36 -04:00
cpu.c target/arm: Enable ARMv8.2-ATS1E1 in -cpu max 2020-03-21 17:43:54 -04:00
cpu.h target/arm: Update MSR access to UAO 2020-03-21 17:48:01 -04:00
crypto_helper.c
debug_helper.c target/arm: Add CONTEXTIDR_EL2 2020-03-21 13:39:20 -04:00
helper-a64.c target/arm: Introduce aarch64_pstate_valid_mask 2020-03-21 17:26:00 -04:00
helper-a64.h
helper-sve.h
helper.c target/arm: Implement UAO semantics 2020-03-21 17:50:29 -04:00
helper.h target/arm: Handle trapping to EL2 of AArch32 VMRS instructions 2020-01-07 18:04:16 -05:00
internals.h target/arm: Update MSR access to UAO 2020-03-21 17:48:01 -04:00
iwmmxt_helper.c
kvm-consts.h
m_helper.c target/arm: only update pc after semihosting completes 2020-01-14 08:28:25 -05:00
Makefile.objs target/arm: Add skeleton for T16 decodetree 2019-11-28 02:50:27 -05:00
neon_helper.c target/arm: Use tcg_gen_abs_i64 and tcg_gen_gvec_abs 2019-05-16 16:43:02 -04:00
op_addsub.h
op_helper.c target/arm: Remove CPSR_RESERVED 2020-03-21 17:24:21 -04:00
pauth_helper.c target/arm: Use bit 55 explicitly for pauth 2020-03-21 17:59:06 -04:00
psci.c
sve_helper.c tcg: Use tlb_fill probe from tlb_vaddr_to_host 2019-05-16 18:27:03 -04:00
sve.decode
t16.decode target/arm: Convert T16, long branches 2019-11-28 02:53:54 -05:00
t32.decode target/arm: Convert TT 2019-11-28 02:48:06 -05:00
tlb_helper.c target/arm: Return correct IL bit in merge_syn_data_abort 2020-03-21 12:08:05 -04:00
translate-a64.c target/arm: Flush high bits of sve register after AdvSIMD INS 2020-03-21 17:58:09 -04:00
translate-a64.h tcg: TCGMemOp is now accelerator independent MemOp 2019-11-28 03:01:12 -05:00
translate-sve.c tcg: TCGMemOp is now accelerator independent MemOp 2019-11-28 03:01:12 -05:00
translate-vfp.inc.c target/arm: Handle trapping to EL2 of AArch32 VMRS instructions 2020-01-07 18:04:16 -05:00
translate.c target/arm: Split out aarch32_cpsr_valid_mask 2020-03-21 17:16:20 -04:00
translate.h target/arm: Update get_a64_user_mem_index for VHE 2020-03-21 16:33:52 -04:00
unicorn_aarch64.c
unicorn_arm.c Add implementation of access to the ARM SPSR register. (#1178) 2020-01-14 09:57:55 -05:00
unicorn.h
vec_helper.c
vfp_helper.c target/arm: Handle trapping to EL2 of AArch32 VMRS instructions 2020-01-07 18:04:16 -05:00
vfp-uncond.decode target/arm: Convert VCVTA/VCVTN/VCVTP/VCVTM to decodetree 2019-06-13 16:54:42 -04:00
vfp.decode target/arm: Use vfp_expand_imm() for AArch32 VFP VMOV_imm 2019-06-25 18:20:19 -05:00