Xiaoyao Li 31ab6fbd2c target/i386: Add missed features to Cooperlake CPU model ... It lacks VMX features and two security feature bits (disclosed recently) in MSR_IA32_ARCH_CAPABILITIES in current Cooperlake CPU model, so add them. Fixes: 22a866b6166d ("i386: Add new CPU model Cooperlake") Backports commit 2dea9d9ca4ea7e9afe83d0b4153b21a16987e866 from qemu		2020-01-14 08:43:26 -05:00
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arm	target/arm: only update pc after semihosting completes	2020-01-14 08:28:25 -05:00
i386	target/i386: Add missed features to Cooperlake CPU model	2020-01-14 08:43:26 -05:00
m68k	target/m68k: only change valid bits in CACR	2020-01-14 08:17:14 -05:00
mips	target/mips: Hard code size with MO_{8|16|32|64}	2020-01-07 18:30:39 -05:00
riscv	tcg: TCGMemOp is now accelerator independent MemOp	2019-11-28 03:01:12 -05:00
sparc	target/sparc: sun4u Invert Endian TTE bit	2020-01-07 19:21:30 -05:00