Brijesh Singh b9c18f22cd target-i386/cpu: Add new EPYC CPU model ... Add a new base CPU model called 'EPYC' to model processors from AMD EPYC family (which includes EPYC 76xx,75xx,74xx, 73xx and 72xx). The following features bits have been added/removed compare to Opteron_G5 Added: monitor, movbe, rdrand, mmxext, ffxsr, rdtscp, cr8legacy, osvw, fsgsbase, bmi1, avx2, smep, bmi2, rdseed, adx, smap, clfshopt, sha xsaveopt, xsavec, xgetbv1, arat Removed: xop, fma4, tbm Backports commit 2e2efc7dbe2b0adc1200b5aa286cdbed729f6751 from qemu		2018-03-04 12:22:27 -05:00
..
arch_memory_mapping.c	target/i386: enable A20 automatically in system management mode	2018-03-03 14:33:09 -05:00
bpt_helper.c
cc_helper_template.h
cc_helper.c
cpu-qom.h
cpu.c	target-i386/cpu: Add new EPYC CPU model	2018-03-04 12:22:27 -05:00
cpu.h	i386: expose TCGTCGTCGTCG in the 0x40000000 CPUID leaf	2018-03-03 22:56:32 -05:00
excp_helper.c
fpu_helper.c	target/i386: split cpu_set_mxcsr() and make cpu_set_fpuc() inline	2018-03-03 21:52:29 -05:00
helper.c	target/i386: add the tcg_enabled() in target/i386/	2018-03-03 21:56:31 -05:00
helper.h
int_helper.c
Makefile.objs	target/i386: add the CONFIG_TCG into Makefiles	2018-03-03 21:57:22 -05:00
mem_helper.c
misc_helper.c
mpx_helper.c	target/i386: move cpu_sync_bndcs_hflags() function	2018-03-03 21:41:26 -05:00
ops_sse_header.h
ops_sse.h
seg_helper.c	target/i386: simplify handling of conforming code segments on interrupt	2018-03-03 21:19:48 -05:00
shift_helper_template.h
smm_helper.c
svm_helper.c	target-i386: defer VMEXIT to do_interrupt	2018-03-02 12:49:18 -05:00
svm.h
TODO
topology.h
translate.c	target/i386: set rip_offset for some SSE4.1 instructions	2018-03-04 01:41:43 -05:00
unicorn.c	target/i386: make cpu_get_fp80()/cpu_set_fp80() static	2018-03-03 21:44:09 -05:00
unicorn.h