mirror of
https://github.com/yuzu-emu/unicorn.git
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32b0e506e6
The ARMv8.2-TTCNP extension allows an implementation to optimize by sharing TLB entries between multiple cores, provided that software declares that it's ready to deal with this by setting a CnP bit in the TTBRn_ELx. It is mandatory from ARMv8.2 onward. For QEMU's TLB implementation, sharing TLB entries between different cores would not really benefit us and would be a lot of work to implement. So we implement this extension in the "trivial" manner: we allow the guest to set and read back the CnP bit, but don't change our behaviour (this is an architecturally valid implementation choice). The only code path which looks at the TTBRn_ELx values for the long-descriptor format where the CnP bit is defined is already doing enough masking to not get confused when the CnP bit at the bottom of the register is set, so we can simply add a comment noting why we're relying on that mask. Backports commit 41a4bf1feab098da4cd5495cd56a99b0339e2275 from qemu |
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| .. | ||
| accel | ||
| crypto | ||
| default-configs | ||
| docs | ||
| fpu | ||
| hw | ||
| include | ||
| qapi | ||
| qobject | ||
| qom | ||
| scripts | ||
| target | ||
| tcg | ||
| util | ||
| aarch64.h | ||
| aarch64eb.h | ||
| accel.c | ||
| arm.h | ||
| armeb.h | ||
| CODING_STYLE.rst | ||
| configure | ||
| COPYING | ||
| COPYING.LIB | ||
| cpus.c | ||
| exec.c | ||
| gen_all_header.sh | ||
| glib_compat.c | ||
| header_gen.py | ||
| ioport.c | ||
| LICENSE | ||
| m68k.h | ||
| Makefile | ||
| Makefile.objs | ||
| Makefile.target | ||
| memory_ldst.inc.c | ||
| memory_mapping.c | ||
| memory.c | ||
| mips64.h | ||
| mips64el.h | ||
| mips.h | ||
| mipsel.h | ||
| powerpc.h | ||
| qemu-timer.c | ||
| riscv32.h | ||
| riscv64.h | ||
| rules.mak | ||
| sparc64.h | ||
| sparc.h | ||
| unicorn_common.h | ||
| VERSION | ||
| vl.c | ||
| vl.h | ||
| x86_64.h | ||