unicorn/qemu
Peter Maydell 3fb3403b82
target/arm: Convert single-precision register moves to decodetree
Convert the "single-precision" register moves to decodetree:
* VMSR
* VMRS
* VMOV between general purpose register and single precision

Note that the VMSR/VMRS conversions make our handling of
the "should this UNDEF?" checks consistent between the two
instructions:
* VMSR to MVFR0, MVFR1, MVFR2 now UNDEF from EL0
  (previously was a nop)
* VMSR to FPSID now UNDEFs from EL0 or if VFPv3 or better
  (previously was a nop)
* VMSR to FPINST and FPINST2 now UNDEF if VFPv3 or better
  (previously would write to the register, which had no
  guest-visible effect because we always UNDEF reads)

We also tighten up the decode: we were previously underdecoding
some SBZ or SBO bits.

The conversion of VMOV_single includes the expansion out of the
gen_mov_F0_vreg()/gen_vfp_mrs() and gen_mov_vreg_F0()/gen_vfp_msr()
sequences into the simpler direct load/store of the TCG temp via
neon_{load,store}_reg32(): we know in the new function that we're
always single-precision, we don't need to use the old-and-deprecated
cpu_F0* TCG globals, and we don't happen to have the declaration of
gen_vfp_msr() and gen_vfp_mrs() at the point in the file where the
new function is.

Backports commit a9ab50011aeda2dd012da99069e078379315ea18 from qemu
2019-06-13 17:16:38 -04:00
..
accel tcg: Fix typos in helper_gvec_sar{8,32,64}v 2019-06-13 16:09:16 -04:00
crypto
default-configs
docs
fpu
hw target/i386: Use env_cpu, env_archcpu 2019-06-12 11:46:35 -04:00
include cpu: Move icount_decr to CPUNegativeOffsetState 2019-06-13 15:34:28 -04:00
qapi
qobject
qom cpu: Move icount_decr to CPUNegativeOffsetState 2019-06-13 15:34:28 -04:00
scripts decodetree: Fix comparison of Field 2019-06-13 16:17:56 -04:00
target target/arm: Convert single-precision register moves to decodetree 2019-06-13 17:16:38 -04:00
tcg cpu: Move icount_decr to CPUNegativeOffsetState 2019-06-13 15:34:28 -04:00
util
aarch64.h tcg: Add support for vector compare select 2019-05-24 18:21:13 -04:00
aarch64eb.h tcg: Add support for vector compare select 2019-05-24 18:21:13 -04:00
accel.c
arm.h target/arm: Use tcg_gen_gvec_bitsel 2019-06-13 16:12:56 -04:00
armeb.h target/arm: Use tcg_gen_gvec_bitsel 2019-06-13 16:12:56 -04:00
CODING_STYLE
configure
COPYING
COPYING.LIB
cpus.c
exec.c
gen_all_header.sh
glib_compat.c
HACKING
header_gen.py target/arm: Use tcg_gen_gvec_bitsel 2019-06-13 16:12:56 -04:00
ioport.c
LICENSE
m68k.h tcg: Add support for vector compare select 2019-05-24 18:21:13 -04:00
Makefile
Makefile.objs
Makefile.target
memory_ldst.inc.c
memory_mapping.c
memory.c
mips64.h target/mips: Refactor and fix INSERT.<B|H|W|D> instructions 2019-05-28 19:42:28 -04:00
mips64el.h target/mips: Refactor and fix INSERT.<B|H|W|D> instructions 2019-05-28 19:42:28 -04:00
mips.h target/mips: Refactor and fix INSERT.<B|H|W|D> instructions 2019-05-28 19:42:28 -04:00
mipsel.h target/mips: Refactor and fix INSERT.<B|H|W|D> instructions 2019-05-28 19:42:28 -04:00
powerpc.h tcg: Add support for vector compare select 2019-05-24 18:21:13 -04:00
qemu-timer.c
riscv32.h tcg: Add support for vector compare select 2019-05-24 18:21:13 -04:00
riscv64.h tcg: Add support for vector compare select 2019-05-24 18:21:13 -04:00
rules.mak
sparc64.h tcg: Add support for vector compare select 2019-05-24 18:21:13 -04:00
sparc.h tcg: Add support for vector compare select 2019-05-24 18:21:13 -04:00
unicorn_common.h
VERSION
vl.c
vl.h
x86_64.h tcg: Add support for vector compare select 2019-05-24 18:21:13 -04:00