unicorn/qemu/target/mips
Fredrik Noring ee4b59e981
target/mips: Support R5900 three-operand MADD1 and MADDU1 instructions
The three-operand MADD and MADDU are specific to R5900 cores.

Backports commit a95c4c26f1dc233987350e7cb1cf62d46ade5ce5 from qemu
2019-01-05 08:07:56 -05:00
..
cp0_timer.c
cpu-qom.h
cpu.c target/mips/cpu: Use type_register instead of type_register_static() in mips_cpu_register_types() 2018-09-03 17:36:23 -04:00
cpu.h target/mips: Introduce MXU registers 2018-11-11 05:50:52 -05:00
dsp_helper.c
helper.c target/mips: Implement hardware page table walker for MIPS32 2018-10-23 14:29:27 -04:00
helper.h target/mips: Add CP0 PWCtl register 2018-10-23 14:23:04 -04:00
internal.h target/mips: Implement hardware page table walker for MIPS32 2018-10-23 14:29:27 -04:00
lmi_helper.c
Makefile.objs
mips-defs.h target/mips: Define a bit for MXU in insn_flags 2018-11-11 05:52:18 -05:00
msa_helper.c target/mips: Remove floatX_maybe_silence_nan from conversions 2018-05-19 23:25:04 -04:00
op_helper.c target/mips: Implement hardware page table walker for MIPS32 2018-10-23 14:29:27 -04:00
TODO
translate_init.c target/mips: Disable R5900 support 2018-11-23 18:55:12 -05:00
translate.c target/mips: Support R5900 three-operand MADD1 and MADDU1 instructions 2019-01-05 08:07:56 -05:00
unicorn.c Use DEFINE_MACHINE() to register all machines 2018-03-11 15:12:46 -04:00
unicorn.h