Peter Maydell 4b816fe0aa target/arm: Implement BXNS, and banked stack pointers ... Implement the BXNS v8M instruction, which is like BX but will do a jump-and-switch-to-NonSecure if the branch target address has bit 0 clear. This is the first piece of code which implements "switch to the other security state", so the commit also includes the code to switch the stack pointers around, which is the only complicated part of switching security state. BLXNS is more complicated than just "BXNS but set the link register", so we leave it for a separate commit. Backports commit fb602cb726b3ebdd01ef3b1732d74baf9fee7ec9 from qemu		2018-03-04 21:21:23 -05:00
..
accel	target/arm: [tcg] Port to generic translation framework	2018-03-04 20:28:06 -05:00
crypto
default-configs
docs
fpu	softfloat: define floatx80_round()	2018-03-03 20:57:27 -05:00
hw
include	tcg: Add generic translation framework	2018-03-04 14:31:16 -05:00
qapi	qapi: add explicit null to string input and output visitors	2018-03-03 20:32:50 -05:00
qobject	qnum: add uint type	2018-03-03 18:37:56 -05:00
qom	cpu: cpu_by_arch_id() helper	2018-03-04 12:16:39 -05:00
scripts	scripts: use build_ prefix for string not piped through cgen()	2018-03-03 22:11:28 -05:00
target	target/arm: Implement BXNS, and banked stack pointers	2018-03-04 21:21:23 -05:00
tcg	tcg/s390: Use slbgr for setcond le and leu	2018-03-04 13:48:42 -05:00
util	util/cacheinfo: Add missing include for ppc linux	2018-03-03 23:05:44 -05:00
aarch64.h	target/arm: Implement BXNS, and banked stack pointers	2018-03-04 21:21:23 -05:00
aarch64eb.h	target/arm: Implement BXNS, and banked stack pointers	2018-03-04 21:21:23 -05:00
accel.c
arm.h	target/arm: Implement BXNS, and banked stack pointers	2018-03-04 21:21:23 -05:00
armeb.h	target/arm: Implement BXNS, and banked stack pointers	2018-03-04 21:21:23 -05:00
atomic_template.h
CODING_STYLE
configure	build: add -Wexpansion-to-defined	2018-03-03 22:12:31 -05:00
COPYING
COPYING.LIB
cpu-exec-common.c
cpu-exec.c
cpus.c
cputlb.c	cputlb: Support generating CPU exceptions on memory transaction failures	2018-03-04 13:14:50 -05:00
exec.c	memory: Open code FlatView rendering	2018-03-04 02:06:48 -05:00
gen_all_header.sh
glib_compat.c
HACKING
header_gen.py	target/arm: Implement BXNS, and banked stack pointers	2018-03-04 21:21:23 -05:00
ioport.c
LICENSE
m68k.h	target/arm: Implement BXNS, and banked stack pointers	2018-03-04 21:21:23 -05:00
Makefile
Makefile.objs
Makefile.target	tcg: Add generic translation framework	2018-03-04 14:31:16 -05:00
memory_ldst.inc.c
memory_mapping.c
memory.c	memory: Move FlatView allocation to a helper	2018-03-04 02:08:37 -05:00
mips64.h	target/arm: Implement BXNS, and banked stack pointers	2018-03-04 21:21:23 -05:00
mips64el.h	target/arm: Implement BXNS, and banked stack pointers	2018-03-04 21:21:23 -05:00
mips.h	target/arm: Implement BXNS, and banked stack pointers	2018-03-04 21:21:23 -05:00
mipsel.h	target/arm: Implement BXNS, and banked stack pointers	2018-03-04 21:21:23 -05:00
powerpc.h	target/arm: Implement BXNS, and banked stack pointers	2018-03-04 21:21:23 -05:00
qapi-schema.json	qapi: Update scripts to commit 01b2ffcedd94ad7b42bc870e4c6936c87ad03429	2018-03-03 18:32:12 -05:00
qemu-timer.c
rules.mak
softmmu_template.h	cputlb: Support generating CPU exceptions on memory transaction failures	2018-03-04 13:14:50 -05:00
sparc64.h	target/arm: Implement BXNS, and banked stack pointers	2018-03-04 21:21:23 -05:00
sparc.h	target/arm: Implement BXNS, and banked stack pointers	2018-03-04 21:21:23 -05:00
tcg-runtime.c	tcg: Increase hit rate of lookup_tb_ptr	2018-03-03 17:16:23 -05:00
translate-all.c	tcg: Pass generic CPUState to gen_intermediate_code()	2018-03-03 23:34:18 -05:00
translate-all.h
translate-common.c
unicorn_common.h
VERSION
vl.c
vl.h	import	2015-08-21 15:04:50 +08:00
x86_64.h	target/arm: Implement BXNS, and banked stack pointers	2018-03-04 21:21:23 -05:00