unicorn/qemu/target/i386
Pu Wen 4bbf02a5f6
i386: Add new Hygon 'Dhyana' CPU model
Add a new base CPU model called 'Dhyana' to model processors from Hygon
Dhyana(family 18h), which derived from AMD EPYC(family 17h).

The following features bits have been removed compare to AMD EPYC:
aes, pclmulqdq, sha_ni

The Hygon Dhyana support to KVM in Linux is already accepted upstream[1].
So add Hygon Dhyana support to Qemu is necessary to create Hygon's own
CPU model.

Reference:
[1] https://git.kernel.org/tip/fec98069fb72fb656304a3e52265e0c2fc9adf87

Backports commit 8d031cec366f26669807eb43f61eb335973b7053 from qemu
2019-04-30 09:13:55 -04:00
..
arch_memory_mapping.c
bpt_helper.c
cc_helper_template.h
cc_helper.c
cpu-qom.h
cpu.c i386: Add new Hygon 'Dhyana' CPU model 2019-04-30 09:13:55 -04:00
cpu.h i386: Add new Hygon 'Dhyana' CPU model 2019-04-30 09:13:55 -04:00
excp_helper.c target/i386: rename HF_SVMI_MASK to HF_GUEST_MASK 2018-10-04 04:24:39 -04:00
fpu_helper.c
helper.c
helper.h
int_helper.c
Makefile.objs
mem_helper.c target/i386: Convert to HAVE_CMPXCHG128 2018-10-23 15:21:03 -04:00
misc_helper.c i386: implement MSR_SMI_COUNT for TCG 2018-08-02 21:27:08 -04:00
mpx_helper.c
ops_sse_header.h
ops_sse.h
seg_helper.c cpu_ldst.h: Use inline functions for usermode cpu_ld/st accessors 2019-04-22 07:08:39 -04:00
shift_helper_template.h
smm_helper.c i386: implement MSR_SMI_COUNT for TCG 2018-08-02 21:27:08 -04:00
svm_helper.c target/i386: rename HF_SVMI_MASK to HF_GUEST_MASK 2018-10-04 04:24:39 -04:00
svm.h target-i386: Add NPT support 2018-07-03 19:52:56 -04:00
TODO
topology.h
translate.c exec: Backport tb_cflags accessor 2019-04-22 06:12:59 -04:00
unicorn.c support for YMM registers ymm8-ymm15 (#1079) 2019-04-16 06:35:41 -04:00
unicorn.h