unicorn/qemu/target/arm
Peter Maydell 78303d4c1b
arm: Fix APSR writes via M profile MSR
Our implementation of writes to the APSR for M-profile via the MSR
instruction was badly broken.

First and worst, we had the sense wrong on the test of bit 2 of the
SYSm field -- this is supposed to request an APSR write if bit 2 is 0
but we were doing it if bit 2 was 1. This bug was introduced in
commit 58117c9bb429cd, so hasn't been in a QEMU release.

Secondly, the choice of exactly which parts of APSR should be written
is defined by bits in the 'mask' field. We were not passing these
through from instruction decode, making it impossible to check them
in the helper.

Pass the mask bits through from the instruction decode to the helper
function and process them appropriately; fix the wrong sense of the
SYSm bit 2 check.

Invalid mask values and invalid combinations of mask and register
number are UNPREDICTABLE; we choose to treat them as if the mask
values were valid.

Backports commit b28b3377d7e9ba35611d454d5a63ef50cab1f8c5 from qemu
2018-03-02 14:08:13 -05:00
..
arm_ldst.h Fix Thumb-1 BE32 execution and disassembly. 2018-03-02 00:20:11 -05:00
arm-powerctl.c ARM: Factor out ARM on/off PSCI control functions 2018-03-01 23:31:47 -05:00
arm-powerctl.h ARM: Factor out ARM on/off PSCI control functions 2018-03-01 23:31:47 -05:00
cpu64.c target-arm: Enable EL2 feature bit on A53 and A57 2018-03-01 23:36:44 -05:00
cpu-qom.h
cpu.c armv7m: R14 should reset to 0xffffffff 2018-03-02 13:56:36 -05:00
cpu.h armv7m: Report no-coprocessor faults correctly 2018-03-02 13:47:14 -05:00
crypto_helper.c
helper-a64.c
helper-a64.h
helper.c arm: Fix APSR writes via M profile MSR 2018-03-02 14:08:13 -05:00
helper.h
internals.h armv7m: Fix reads of CONTROL register bit 1 2018-03-02 13:26:38 -05:00
iwmmxt_helper.c
kvm-consts.h arm: better stub version for MISMATCH_CHECK 2018-03-02 00:13:45 -05:00
Makefile.objs ARM: Factor out ARM on/off PSCI control functions 2018-03-01 23:31:47 -05:00
neon_helper.c
op_addsub.h
op_helper.c target-arm: don't generate WFE/YIELD calls for MTTCG 2018-03-02 10:27:36 -05:00
psci.c target/arm/psci.c: If EL2 implemented, start CPUs in EL2 2018-03-01 23:34:57 -05:00
translate-a64.c Add missing fp_access_check() to aarch64 crypto instructions 2018-03-02 10:39:16 -05:00
translate.c arm: Fix APSR writes via M profile MSR 2018-03-02 14:08:13 -05:00
translate.h target/arm: A32, T32: Create Instruction Syndromes for Data Aborts 2018-03-02 00:37:06 -05:00
unicorn_aarch64.c
unicorn_arm.c
unicorn.h