unicorn/qemu/target/mips
Leon Alrae 6099733fc5
target/mips: reimplement SC instruction emulation and use cmpxchg
Completely rewrite conditional stores handling. Use cmpxchg.

This eliminates need for separate implementations of SC instruction
emulation for user and system emulation.

Backports commit 33a07fa2db66376e6ee780d4a8b064dc5118cf34 from qemu
2019-02-15 17:10:16 -05:00
..
cp0_timer.c
cpu-qom.h
cpu.c target/mips/cpu: Use type_register instead of type_register_static() in mips_cpu_register_types() 2018-09-03 17:36:23 -04:00
cpu.h target/mips: reimplement SC instruction emulation and use cmpxchg 2019-02-15 17:10:16 -05:00
dsp_helper.c
helper.c target/mips: reimplement SC instruction emulation and use cmpxchg 2019-02-15 17:10:16 -05:00
helper.h target/mips: reimplement SC instruction emulation and use cmpxchg 2019-02-15 17:10:16 -05:00
internal.h target/mips: Provide R/W access to SAARI and SAAR CP0 registers 2019-01-22 19:51:38 -05:00
lmi_helper.c
Makefile.objs
mips-defs.h target/mips: Define a bit for MXU in insn_flags 2018-11-11 05:52:18 -05:00
msa_helper.c target/mips: Remove floatX_maybe_silence_nan from conversions 2018-05-19 23:25:04 -04:00
op_helper.c target/mips: reimplement SC instruction emulation and use cmpxchg 2019-02-15 17:10:16 -05:00
TODO
translate_init.c target/mips: Add I6500 core configuration 2019-01-25 13:46:18 -05:00
translate.c target/mips: reimplement SC instruction emulation and use cmpxchg 2019-02-15 17:10:16 -05:00
unicorn.c
unicorn.h