unicorn/qemu
Peter Maydell 6bd44fb70a
target-arm: Ignore low bit of PC in M-profile exception return
For the ARM M-profile cores, exception return pops various registers
including the PC from the stack. The architecture defines that if the
lowest bit in the new PC value is set (ie the PC is not halfword
aligned) then behaviour is UNPREDICTABLE. In practice hardware
implementations seem to simply ignore the low bit, and some buggy
RTOSes incorrectly rely on this. QEMU's behaviour was architecturally
permitted, but bringing QEMU into line with the hardware behaviour
allows more guest code to run. We log the situation as a guest error.

This was reported as LP:1428657.

Backports commit fcf83ab103dce6d2951f24f48e30820e7dbb3622 from qemu
2018-02-12 16:18:07 -05:00
..
default-configs
docs docs: clarify memory region lifecycle 2018-02-12 15:11:21 -05:00
fpu softfloat: expand out STATUS macro 2018-02-12 13:43:13 -05:00
hw target-i386: Move APIC ID compatibility code to pc.c 2018-02-12 15:59:20 -05:00
include bitops.h: sextract64() return type should be int64_t, not uint64_t 2018-02-12 16:08:14 -05:00
qapi
qobject
qom
scripts
target-arm target-arm: Ignore low bit of PC in M-profile exception return 2018-02-12 16:18:07 -05:00
target-i386 x86: fix SS selector in SYSRET 2018-02-12 16:03:43 -05:00
target-m68k target-*: Increment num_insns immediately after tcg_gen_insn_start 2018-02-11 12:46:30 -05:00
target-mips target-mips: add missing MSACSR and restore fp_status and hflags 2018-02-12 16:12:17 -05:00
target-sparc target-*: Increment num_insns immediately after tcg_gen_insn_start 2018-02-11 12:46:30 -05:00
tcg tcg: Allow extra data to be attached to insn_start 2018-02-11 13:03:51 -05:00
util
aarch64.h exec: introduce cpu_reload_memory_map 2018-02-12 15:09:49 -05:00
aarch64eb.h exec: introduce cpu_reload_memory_map 2018-02-12 15:09:49 -05:00
accel.c
arm.h exec: introduce cpu_reload_memory_map 2018-02-12 15:09:49 -05:00
armeb.h exec: introduce cpu_reload_memory_map 2018-02-12 15:09:49 -05:00
CODING_STYLE
configure tcg: Drop ia64 host support 2018-02-04 18:33:02 -05:00
COPYING
COPYING.LIB
cpu-exec.c exec: make iotlb RCU-friendly 2018-02-12 15:20:39 -05:00
cpus.c
cputlb.c exec: make iotlb RCU-friendly 2018-02-12 15:20:39 -05:00
exec.c exec: make iotlb RCU-friendly 2018-02-12 15:20:39 -05:00
gen_all_header.sh
glib_compat.c
HACKING
header_gen.py exec: introduce cpu_reload_memory_map 2018-02-12 15:09:49 -05:00
ioport.c
LICENSE
m68k.h exec: introduce cpu_reload_memory_map 2018-02-12 15:09:49 -05:00
Makefile
Makefile.objs
Makefile.target tcg: Move some opcode generation functions out of line 2018-02-09 08:10:00 -05:00
memory_mapping.c
memory.c
mips64.h exec: introduce cpu_reload_memory_map 2018-02-12 15:09:49 -05:00
mips64el.h exec: introduce cpu_reload_memory_map 2018-02-12 15:09:49 -05:00
mips.h exec: introduce cpu_reload_memory_map 2018-02-12 15:09:49 -05:00
mipsel.h exec: introduce cpu_reload_memory_map 2018-02-12 15:09:49 -05:00
powerpc.h exec: introduce cpu_reload_memory_map 2018-02-12 15:09:49 -05:00
qapi-schema.json
qemu-log.c
qemu-timer.c
rules.mak
softmmu_template.h exec: make iotlb RCU-friendly 2018-02-12 15:20:39 -05:00
sparc64.h exec: introduce cpu_reload_memory_map 2018-02-12 15:09:49 -05:00
sparc.h exec: introduce cpu_reload_memory_map 2018-02-12 15:09:49 -05:00
tcg-runtime.c
translate-all.c target-mips: Correct MIPS16/microMIPS branch size calculation 2018-02-11 16:09:33 -05:00
translate-all.h
unicorn_common.h
VERSION
vl.c
vl.h
x86_64.h exec: introduce cpu_reload_memory_map 2018-02-12 15:09:49 -05:00