Mateja Marjanovic 6dd651af3a target/mips: Fix MSA instructions ST.<B|H|W|D> on big endian host ... Fix the case when the host is a big endian machine, and change the approach toward ST.<B|H|W|D> instruction helpers. Backports commit 6decc572dcedbf298ae30f8213b39c8b842a595a from qemu		2019-05-28 19:29:27 -04:00
..
cp0_timer.c	mips: introduce internal.h and cleanup cpu.h	2018-03-05 00:25:56 -05:00
cpu-qom.h	mips: MIPSCPU model subclasses	2018-03-05 00:42:29 -05:00
cpu.c	target/mips: Convert to CPUClass::tlb_fill	2019-05-16 17:19:47 -04:00
cpu.h	target/mips: reimplement SC instruction emulation and use cmpxchg	2019-02-15 17:10:16 -05:00
dsp_helper.c	mips: Improve macro parenthesization	2018-03-05 00:51:51 -05:00
helper.c	tcg: Use CPUClass::tlb_fill in cputlb.c	2019-05-16 17:35:37 -04:00
helper.h	target/mips: reimplement SC instruction emulation and use cmpxchg	2019-02-15 17:10:16 -05:00
internal.h	target/mips: Convert to CPUClass::tlb_fill	2019-05-16 17:19:47 -04:00
lmi_helper.c
Makefile.objs	mips: introduce internal.h and cleanup cpu.h	2018-03-05 00:25:56 -05:00
mips-defs.h	target/mips: Define a bit for MXU in insn_flags	2018-11-11 05:52:18 -05:00
msa_helper.c	target/mips: Make the results of MOD_<U|S>.<B|H|W|D> the same as on hardware	2019-05-28 19:25:00 -04:00
op_helper.c	target/mips: Fix MSA instructions ST.<B|H|W|D> on big endian host	2019-05-28 19:29:27 -04:00
TODO
translate_init.c	target/mips: Restore Qemu's organization of CPU definitions	2019-03-08 01:40:50 -05:00
translate.c	tcg: Hoist max_insns computation to tb_gen_code	2019-04-30 09:49:57 -04:00
unicorn.c	Use DEFINE_MACHINE() to register all machines	2018-03-11 15:12:46 -04:00
unicorn.h