Laurent Vivier 50aa85e560 target/m68k: implement opcode fetoxm1 ... Example provided in the launchpad bug fails with: qemu: uncaught target signal 4 (Illegal instruction) - core dumped Illegal instruction (core dumped) It appears fetoxm1 is not implemented: IN: expm1f 0x800005cc: fetoxm1x %fp2,%fp0 Disassembler disagrees with translator over instruction decoding Please report this to qemu-devel@nongnu.org (gdb) x/2hx 0x800005cc 0x800005cc: 0xf200 0x0808 This patch adds the instruction. Backports commit 250b1da35d579f42319af234f36207902ca4baa4 from qemu		2020-06-14 21:13:29 -04:00
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cpu-param.h	tcg: Split out target/arch/cpu-param.h	2019-06-10 19:35:46 -04:00
cpu-qom.h	m68k comments break patch submission due to being incorrectly formatted	2019-08-08 14:26:45 -04:00
cpu.c	target/m68k: only change valid bits in CACR	2020-01-14 08:17:14 -05:00
cpu.h	target/m68k: only change valid bits in CACR	2020-01-14 08:17:14 -05:00
fpu_helper.c	target/m68k: implement opcode fetoxm1	2020-06-14 21:13:29 -04:00
helper.c	target/m68k: only change valid bits in CACR	2020-01-14 08:17:14 -05:00
helper.h	target/m68k: implement opcode fetoxm1	2020-06-14 21:13:29 -04:00
Makefile.objs	target/m68k: add fmod/frem	2018-03-09 01:28:58 -05:00
op_helper.c	m68k comments break patch submission due to being incorrectly formatted	2019-08-08 14:26:45 -04:00
qregs.def	target-m68k: use floatx80 internally	2018-03-03 19:35:17 -05:00
softfloat_fpsp_tables.h	m68k comments break patch submission due to being incorrectly formatted	2019-08-08 14:26:45 -04:00
softfloat.c	softfloat: Replace flag with bool	2020-05-21 17:48:12 -04:00
softfloat.h	m68k comments break patch submission due to being incorrectly formatted	2019-08-08 14:26:45 -04:00
translate.c	target/m68k: implement opcode fetoxm1	2020-06-14 21:13:29 -04:00
unicorn.c	Use DEFINE_MACHINE() to register all machines	2018-03-11 15:12:46 -04:00
unicorn.h