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The current VFP code has two different idioms for loading and storing from the VFP register file: 1 using the gen_mov_F0_vreg() and similar functions, which load and store to a fixed set of TCG globals cpu_F0s, CPU_F0d, etc 2 by direct calls to tcg_gen_ld_f64() and friends We want to phase out idiom 1 (because the use of the fixed globals is a relic of a much older version of TCG), but idiom 2 is quite longwinded: tcg_gen_ld_f64(tmp, cpu_env, vfp_reg_offset(true, reg)) requires us to specify the 64-bitness twice, once in the function name and once by passing 'true' to vfp_reg_offset(). There's no guard against accidentally passing the wrong flag. Instead, let's move to a convention of accessing 64-bit registers via the existing neon_load_reg64() and neon_store_reg64(), and provide new neon_load_reg32() and neon_store_reg32() for the 32-bit equivalents. Implement the new functions and use them in the code in translate-vfp.inc.c. We will convert the rest of the VFP code as we do the decodetree conversion in subsequent commits. Backports commit 160f3b64c5cc4c8a09a1859edc764882ce6ad6bf from qemu |
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.. | ||
accel | ||
crypto | ||
default-configs | ||
docs | ||
fpu | ||
hw | ||
include | ||
qapi | ||
qobject | ||
qom | ||
scripts | ||
target | ||
tcg | ||
util | ||
aarch64.h | ||
aarch64eb.h | ||
accel.c | ||
arm.h | ||
armeb.h | ||
CODING_STYLE | ||
configure | ||
COPYING | ||
COPYING.LIB | ||
cpus.c | ||
exec.c | ||
gen_all_header.sh | ||
glib_compat.c | ||
HACKING | ||
header_gen.py | ||
ioport.c | ||
LICENSE | ||
m68k.h | ||
Makefile | ||
Makefile.objs | ||
Makefile.target | ||
memory_ldst.inc.c | ||
memory_mapping.c | ||
memory.c | ||
mips64.h | ||
mips64el.h | ||
mips.h | ||
mipsel.h | ||
powerpc.h | ||
qemu-timer.c | ||
riscv32.h | ||
riscv64.h | ||
rules.mak | ||
sparc64.h | ||
sparc.h | ||
unicorn_common.h | ||
VERSION | ||
vl.c | ||
vl.h | ||
x86_64.h |