mirror of
https://github.com/yuzu-emu/unicorn.git
synced 2024-10-21 01:58:19 +02:00
7a6f61057b
Previously we weren't even initializing the instruction table, so any attempt at emulation would cause a segmentation fault. This also moves the end address check after the decoding to correctly perform exiting behavior with the new translator model.
312 lines
9.4 KiB
C
312 lines
9.4 KiB
C
/*
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* QEMU Motorola 68k CPU
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*
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* Copyright (c) 2012 SUSE LINUX Products GmbH
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see
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* <http://www.gnu.org/licenses/lgpl-2.1.html>
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*/
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#include "qemu/osdep.h"
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#include "qapi/error.h"
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#include "hw/m68k/m68k.h"
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#include "cpu.h"
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#include "qemu-common.h"
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#include "exec/exec-all.h"
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#include "fpu/softfloat.h"
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static void m68k_cpu_set_pc(CPUState *cs, vaddr value)
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{
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M68kCPU *cpu = M68K_CPU(cs->uc, cs);
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cpu->env.pc = value;
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}
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static bool m68k_cpu_has_work(CPUState *cs)
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{
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return cs->interrupt_request & CPU_INTERRUPT_HARD;
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}
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static void m68k_set_feature(CPUM68KState *env, int feature)
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{
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env->features |= (1u << feature);
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}
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/* CPUClass::reset() */
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static void m68k_cpu_reset(CPUState *s)
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{
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M68kCPU *cpu = M68K_CPU(s->uc, s);
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M68kCPUClass *mcc = M68K_CPU_GET_CLASS(s->uc, cpu);
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CPUM68KState *env = &cpu->env;
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floatx80 nan = floatx80_default_nan(NULL);
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int i;
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mcc->parent_reset(s);
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memset(env, 0, offsetof(CPUM68KState, end_reset_fields));
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#ifdef CONFIG_SOFTMMU
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cpu_m68k_set_sr(env, SR_S | SR_I);
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#else
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cpu_m68k_set_sr(env, 0);
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#endif
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for (i = 0; i < 8; i++) {
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env->fregs[i].d = nan;
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}
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cpu_m68k_set_fpcr(env, 0);
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env->fpsr = 0;
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/* TODO: We should set PC from the interrupt vector. */
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env->pc = 0;
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}
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/* CPU models */
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static ObjectClass *m68k_cpu_class_by_name(struct uc_struct *uc, const char *cpu_model)
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{
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ObjectClass *oc;
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char *typename;
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if (cpu_model == NULL) {
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return NULL;
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}
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typename = g_strdup_printf(M68K_CPU_TYPE_NAME("%s"), cpu_model);
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oc = object_class_by_name(uc, typename);
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g_free(typename);
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if (oc != NULL && (object_class_dynamic_cast(uc, oc, TYPE_M68K_CPU) == NULL ||
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object_class_is_abstract(oc))) {
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return NULL;
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}
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return oc;
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}
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static void m5206_cpu_initfn(struct uc_struct *uc, Object *obj, void *opaque)
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{
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M68kCPU *cpu = M68K_CPU(uc, obj);
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CPUM68KState *env = &cpu->env;
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m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
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}
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static void m68000_cpu_initfn(struct uc_struct *uc, Object *obj, void *opaque)
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{
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M68kCPU *cpu = M68K_CPU(uc, obj);
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CPUM68KState *env = &cpu->env;
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m68k_set_feature(env, M68K_FEATURE_M68000);
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m68k_set_feature(env, M68K_FEATURE_USP);
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m68k_set_feature(env, M68K_FEATURE_WORD_INDEX);
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m68k_set_feature(env, M68K_FEATURE_MOVEP);
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}
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static void m68020_cpu_initfn(struct uc_struct *uc, Object *obj, void *opaque)
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{
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M68kCPU *cpu = M68K_CPU(uc, obj);
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CPUM68KState *env = &cpu->env;
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m68k_set_feature(env, M68K_FEATURE_M68000);
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m68k_set_feature(env, M68K_FEATURE_USP);
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m68k_set_feature(env, M68K_FEATURE_WORD_INDEX);
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m68k_set_feature(env, M68K_FEATURE_QUAD_MULDIV);
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m68k_set_feature(env, M68K_FEATURE_BRAL);
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m68k_set_feature(env, M68K_FEATURE_BCCL);
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m68k_set_feature(env, M68K_FEATURE_BITFIELD);
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m68k_set_feature(env, M68K_FEATURE_EXT_FULL);
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m68k_set_feature(env, M68K_FEATURE_SCALED_INDEX);
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m68k_set_feature(env, M68K_FEATURE_LONG_MULDIV);
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m68k_set_feature(env, M68K_FEATURE_FPU);
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m68k_set_feature(env, M68K_FEATURE_CAS);
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m68k_set_feature(env, M68K_FEATURE_BKPT);
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m68k_set_feature(env, M68K_FEATURE_RTD);
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m68k_set_feature(env, M68K_FEATURE_CHK2);
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m68k_set_feature(env, M68K_FEATURE_MOVEP);
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}
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#define m68030_cpu_initfn m68020_cpu_initfn
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static void m68040_cpu_initfn(struct uc_struct *uc, Object *obj, void *opaque)
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{
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M68kCPU *cpu = M68K_CPU(uc, obj);
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CPUM68KState *env = &cpu->env;
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m68020_cpu_initfn(uc, obj, opaque);
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m68k_set_feature(env, M68K_FEATURE_M68040);
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}
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static void m68060_cpu_initfn(struct uc_struct *uc, Object *obj, void *opaque)
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{
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M68kCPU *cpu = M68K_CPU(uc, obj);
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CPUM68KState *env = &cpu->env;
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m68k_set_feature(env, M68K_FEATURE_M68000);
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m68k_set_feature(env, M68K_FEATURE_USP);
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m68k_set_feature(env, M68K_FEATURE_WORD_INDEX);
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m68k_set_feature(env, M68K_FEATURE_BRAL);
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m68k_set_feature(env, M68K_FEATURE_BCCL);
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m68k_set_feature(env, M68K_FEATURE_BITFIELD);
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m68k_set_feature(env, M68K_FEATURE_EXT_FULL);
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m68k_set_feature(env, M68K_FEATURE_SCALED_INDEX);
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m68k_set_feature(env, M68K_FEATURE_LONG_MULDIV);
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m68k_set_feature(env, M68K_FEATURE_FPU);
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m68k_set_feature(env, M68K_FEATURE_CAS);
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m68k_set_feature(env, M68K_FEATURE_BKPT);
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m68k_set_feature(env, M68K_FEATURE_RTD);
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m68k_set_feature(env, M68K_FEATURE_CHK2);
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}
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static void m5208_cpu_initfn(struct uc_struct *uc, Object *obj, void *opaque)
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{
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M68kCPU *cpu = M68K_CPU(uc, obj);
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CPUM68KState *env = &cpu->env;
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m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
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m68k_set_feature(env, M68K_FEATURE_CF_ISA_APLUSC);
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m68k_set_feature(env, M68K_FEATURE_BRAL);
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m68k_set_feature(env, M68K_FEATURE_CF_EMAC);
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m68k_set_feature(env, M68K_FEATURE_USP);
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}
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static void cfv4e_cpu_initfn(struct uc_struct *uc, Object *obj, void *opaque)
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{
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M68kCPU *cpu = M68K_CPU(uc, obj);
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CPUM68KState *env = &cpu->env;
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m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
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m68k_set_feature(env, M68K_FEATURE_CF_ISA_B);
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m68k_set_feature(env, M68K_FEATURE_BRAL);
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m68k_set_feature(env, M68K_FEATURE_CF_FPU);
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m68k_set_feature(env, M68K_FEATURE_CF_EMAC);
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m68k_set_feature(env, M68K_FEATURE_USP);
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}
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static void any_cpu_initfn(struct uc_struct *uc, Object *obj, void *opaque)
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{
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M68kCPU *cpu = M68K_CPU(uc, obj);
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CPUM68KState *env = &cpu->env;
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m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
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m68k_set_feature(env, M68K_FEATURE_CF_ISA_B);
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m68k_set_feature(env, M68K_FEATURE_CF_ISA_APLUSC);
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m68k_set_feature(env, M68K_FEATURE_BRAL);
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m68k_set_feature(env, M68K_FEATURE_CF_FPU);
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/* MAC and EMAC are mututally exclusive, so pick EMAC.
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It's mostly backwards compatible. */
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m68k_set_feature(env, M68K_FEATURE_CF_EMAC);
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m68k_set_feature(env, M68K_FEATURE_CF_EMAC_B);
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m68k_set_feature(env, M68K_FEATURE_USP);
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m68k_set_feature(env, M68K_FEATURE_EXT_FULL);
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m68k_set_feature(env, M68K_FEATURE_WORD_INDEX);
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}
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static int m68k_cpu_realizefn(struct uc_struct *uc, DeviceState *dev, Error **errp)
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{
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CPUState *cs = CPU(dev);
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M68kCPU *cpu = M68K_CPU(uc, dev);
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M68kCPUClass *mcc = M68K_CPU_GET_CLASS(uc, dev);
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register_m68k_insns(&cpu->env);
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cpu_reset(cs);
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qemu_init_vcpu(cs);
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mcc->parent_realize(cs->uc, dev, errp);
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return 0;
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}
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static void m68k_cpu_initfn(struct uc_struct *uc, Object *obj, void *opaque)
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{
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CPUState *cs = CPU(obj);
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M68kCPU *cpu = M68K_CPU(uc, obj);
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CPUM68KState *env = &cpu->env;
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cs->env_ptr = env;
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cpu_exec_init(cs, &error_abort, opaque);
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}
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static void m68k_cpu_class_init(struct uc_struct *uc, ObjectClass *c, void *data)
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{
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M68kCPUClass *mcc = M68K_CPU_CLASS(uc, c);
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CPUClass *cc = CPU_CLASS(uc, c);
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DeviceClass *dc = DEVICE_CLASS(uc, c);
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mcc->parent_realize = dc->realize;
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dc->realize = m68k_cpu_realizefn;
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mcc->parent_reset = cc->reset;
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cc->reset = m68k_cpu_reset;
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cc->class_by_name = m68k_cpu_class_by_name;
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cc->has_work = m68k_cpu_has_work;
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cc->do_interrupt = m68k_cpu_do_interrupt;
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cc->cpu_exec_interrupt = m68k_cpu_exec_interrupt;
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cc->set_pc = m68k_cpu_set_pc;
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cc->handle_mmu_fault = m68k_cpu_handle_mmu_fault;
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#if defined(CONFIG_SOFTMMU)
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cc->do_unassigned_access = m68k_cpu_unassigned_access;
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cc->get_phys_page_debug = m68k_cpu_get_phys_page_debug;
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#endif
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cc->tcg_initialize = m68k_tcg_init;
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}
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#define DEFINE_M68K_CPU_TYPE(cpu_model, initfn) \
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{ \
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M68K_CPU_TYPE_NAME(cpu_model), \
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TYPE_M68K_CPU, \
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\
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0, \
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0, \
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NULL, \
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\
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initfn, \
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}
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static TypeInfo m68k_cpus_type_infos[] = {
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{ /* base class should be registered first */
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TYPE_M68K_CPU,
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TYPE_CPU,
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sizeof(M68kCPUClass),
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sizeof(M68kCPU),
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NULL,
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m68k_cpu_initfn,
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NULL,
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NULL,
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NULL,
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m68k_cpu_class_init,
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NULL,
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NULL,
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true,
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},
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DEFINE_M68K_CPU_TYPE("m68000", m68000_cpu_initfn),
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DEFINE_M68K_CPU_TYPE("m68020", m68020_cpu_initfn),
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DEFINE_M68K_CPU_TYPE("m68030", m68030_cpu_initfn),
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DEFINE_M68K_CPU_TYPE("m68040", m68040_cpu_initfn),
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DEFINE_M68K_CPU_TYPE("m68060", m68060_cpu_initfn),
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DEFINE_M68K_CPU_TYPE("m5206", m5206_cpu_initfn),
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DEFINE_M68K_CPU_TYPE("m5208", m5208_cpu_initfn),
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DEFINE_M68K_CPU_TYPE("cfv4e", cfv4e_cpu_initfn),
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DEFINE_M68K_CPU_TYPE("any", any_cpu_initfn),
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};
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void m68k_cpu_register_types(void *opaque)
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{
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m68k_cpus_type_infos[0].instance_userdata = opaque;
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type_register_static_array(opaque, m68k_cpus_type_infos, ARRAY_SIZE(m68k_cpus_type_infos));
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}
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