unicorn/qemu/target
Catherine Ho 841ac2b3bb
target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be
The lo,hi order is different from the comments. And in commit
1ec182c33379 ("target/arm: Convert to HAVE_CMPXCHG128"), it changes
the original code logic. So just restore the old code logic before this
commit:
do_paired_cmpxchg64_be():
cmpv = int128_make128(env->exclusive_high, env->exclusive_val);
newv = int128_make128(new_hi, new_lo);

This fixes a bug that would only be visible for big-endian
AArch64 guest code.

Fixes: 1ec182c33379 ("target/arm: Convert to HAVE_CMPXCHG128")

Backports commit abd5abc58c5d4c9bd23427b0998a44eb87ed47a2 from qemu
2019-02-15 17:16:55 -05:00
..
arm target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be 2019-02-15 17:16:55 -05:00
i386 Revert "i386: Add CPUID bit for PCONFIG" 2019-02-07 08:56:40 -05:00
m68k target/m68k: Fix LGPL information in the file headers 2019-02-03 17:55:29 -05:00
mips target/mips: reimplement SC instruction emulation and use cmpxchg 2019-02-15 17:10:16 -05:00
sparc target: Resolve repeated typedef warnings 2019-01-22 20:27:35 -05:00