Aleksandar Rikalo 8c0248696a target/mips: Fix pre-nanoMIPS MT ASE instructions availability control ... Use bits from configuration registers for availability control of MT ASE instructions, rather than only ISA_MT bit in insn_flags. This is done by adding a field in hflags for MT bit, and adding functions check_mt() and check_cp0_mt(). Backports commit 9affc1c59279f482ff145e0371926f79b6448e3e from qemu		2018-08-27 05:36:38 -04:00
..
arm	target/arm: Remove a handful of stray tabs	2018-08-25 04:34:44 -04:00
i386	target/i386: update MPX flags when CPL changes	2018-08-25 03:32:22 -04:00
m68k	target/m68k: Merge disas_m68k_insn into m68k_tr_translate_insn	2018-06-15 11:40:18 -04:00
mips	target/mips: Fix pre-nanoMIPS MT ASE instructions availability control	2018-08-27 05:36:38 -04:00
sparc	tcg: Pass tb and index to tcg_gen_exit_tb separately	2018-06-07 11:56:32 -04:00