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Unicorn CPU emulator framework (ARM, AArch64, M68K, Mips, Sparc, X86)

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Michael Clark 8ffa68e757 RISC-V: Change local interrupts from edge to level This effectively changes riscv_cpu_update_mip from edge to level. i.e. cpu_interrupt or cpu_reset_interrupt are called regardless of the current interrupt level. Fixes WFI doesn't return when a IPI is issued: - https://github.com/riscv/riscv-qemu/issues/132 To test: 1) Apply RISC-V Linux CPU hotplug patch: - http://lists.infradead.org/pipermail/linux-riscv/2018-May/000603.html 2) Enable CONFIG_CPU_HOTPLUG in linux .config 3) Try to offline and online cpus: echo 1 > /sys/devices/system/cpu/cpu2/online echo 0 > /sys/devices/system/cpu/cpu2/online echo 1 > /sys/devices/system/cpu/cpu2/online Backports commit d26f5a423438e579d3ff0ca35e44edb966a36233 from qemu		2019-03-19 23:58:31 -04:00
bindings	Added x86Msr functions for the go bindings (#986 )	2019-03-08 02:28:37 -05:00
docs	fix invalid script path (#975 ) (#976 )	2019-02-28 17:02:06 -05:00
include	target/riscv: Initial introduction of the RISC-V target	2019-03-08 21:46:10 -05:00
msvc	msvc: Define CONFIG_TCG	2019-01-30 13:52:30 -05:00
qemu	RISC-V: Change local interrupts from edge to level	2019-03-19 23:58:31 -04:00
samples	target/riscv: Initial introduction of the RISC-V target	2019-03-08 21:46:10 -05:00
tests	Add missing x86_vec regression test	2019-02-28 17:08:19 -05:00
.appveyor.yml	MSYS test (#852 )	2017-06-25 10:11:35 +08:00
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.travis.yml	use new travis osx image and brew (#935 )	2018-01-05 10:29:49 +08:00
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COPYING.LGPL2	LGPL2 for all header files under include/unicorn/	2017-12-16 10:08:42 +08:00
CREDITS.TXT	Adding Philippe Antoine to CREDITS	2018-10-06 04:50:10 -04:00
install-cmocka-linux.sh	Start moving examples in S files (#851 )	2017-06-25 10:14:22 +08:00
list.c	callback to count number of instructions in uc_emu_start() should be executed first. fix #727	2017-06-16 13:22:38 +08:00
make.sh	Added MSVC support for arm64eb.	2017-04-25 14:23:58 +10:00
Makefile	target/riscv: Initial introduction of the RISC-V target	2019-03-08 21:46:10 -05:00
msvc.bat	add msvc.bat	2017-04-21 15:35:40 +08:00
pkgconfig.mk	bump extra version to 2	2017-04-21 15:30:40 +08:00
README.md	add Clojure	2017-12-23 00:32:33 +08:00
uc.c	target/riscv: Initial introduction of the RISC-V target	2019-03-08 21:46:10 -05:00
windows_export.bat

README.md

Unicorn Engine

Unicorn is a lightweight, multi-platform, multi-architecture CPU emulator framework based on QEMU.

Unicorn offers some unparalleled features:

Multi-architecture: ARM, ARM64 (ARMv8), M68K, MIPS, SPARC, and X86 (16, 32, 64-bit)
Clean/simple/lightweight/intuitive architecture-neutral API
Implemented in pure C language, with bindings for Crystal, Clojure, Visual Basic, Perl, Rust, Ruby, Python, Java, .NET, Go, Delphi/Free Pascal and Haskell.
Native support for Windows & *nix (with Mac OSX, Linux, *BSD & Solaris confirmed)
High performance via Just-In-Time compilation
Support for fine-grained instrumentation at various levels
Thread-safety by design
Distributed under free software license GPLv2

Further information is available at http://www.unicorn-engine.org

License

This project is released under the GPL license.

Compilation & Docs

See docs/COMPILE.md file for how to compile and install Unicorn.

More documentation is available in docs/README.md.

Contact

Contribute

If you want to contribute, please pick up something from our Github issues.

We also maintain a list of more challenged problems in a TODO list.

CREDITS.TXT records important contributors of our project.