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902886cc45
unicorn/qemu
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Pranith Kumar 902886cc45
tcg: Implement implicit ordering semantics 
Currently, we cannot use mttcg for running strong memory model guests
on weak memory model hosts due to missing ordering semantics.

We implicitly generate fence instructions for stronger guests if an
ordering mismatch is detected. We generate fences only for the orders
for which fence instructions are necessary, for example a fence is not
necessary between a store and a subsequent load on x86 since its
absence in the guest binary tells that ordering need not be
ensured. Also note that if we find multiple subsequent fence
instructions in the generated IR, we combine them in the TCG
optimization pass.

This patch allows us to boot an x86 guest on ARM64 hosts using mttcg.

Backports commit b32dc3370a666e237b2099c22166b15e58cb6df8 from qemu
2018-03-04 13:24:27 -05:00
..
crypto
default-configs
docs
fpu softfloat: define floatx80_round() 2018-03-03 20:57:27 -05:00
hw
include cpu: Define new cpu_transaction_failed() hook 2018-03-04 13:11:50 -05:00
qapi qapi: add explicit null to string input and output visitors 2018-03-03 20:32:50 -05:00
qobject qnum: add uint type 2018-03-03 18:37:56 -05:00
qom cpu: cpu_by_arch_id() helper 2018-03-04 12:16:39 -05:00
scripts scripts: use build_ prefix for string not piped through cgen() 2018-03-03 22:11:28 -05:00
target target/arm: Allow deliver_fault() caller to specify EA bit 2018-03-04 13:20:23 -05:00
tcg tcg: Implement implicit ordering semantics 2018-03-04 13:24:27 -05:00
util util/cacheinfo: Add missing include for ppc linux 2018-03-03 23:05:44 -05:00
aarch64.h memory: Rename memory_region_init_rom() and _rom_device() to _nomigrate() 2018-03-03 22:29:01 -05:00
aarch64eb.h memory: Rename memory_region_init_rom() and _rom_device() to _nomigrate() 2018-03-03 22:29:01 -05:00
accel.c
arm.h memory: Rename memory_region_init_rom() and _rom_device() to _nomigrate() 2018-03-03 22:29:01 -05:00
armeb.h memory: Rename memory_region_init_rom() and _rom_device() to _nomigrate() 2018-03-03 22:29:01 -05:00
atomic_template.h
CODING_STYLE
configure build: add -Wexpansion-to-defined 2018-03-03 22:12:31 -05:00
COPYING
COPYING.LIB
cpu-exec-common.c
cpu-exec.c tcg: Introduce goto_ptr opcode and tcg_gen_lookup_and_goto_ptr 2018-03-02 21:05:18 -05:00
cpus.c
cputlb.c cputlb: Support generating CPU exceptions on memory transaction failures 2018-03-04 13:14:50 -05:00
exec.c memory: Open code FlatView rendering 2018-03-04 02:06:48 -05:00
gen_all_header.sh
glib_compat.c
HACKING
header_gen.py target/mips: Add segmentation control registers 2018-03-04 01:00:42 -05:00
ioport.c
LICENSE
m68k.h memory: Rename memory_region_init_rom() and _rom_device() to _nomigrate() 2018-03-03 22:29:01 -05:00
Makefile
Makefile.objs
Makefile.target tcg: add the CONFIG_TCG into Makefiles 2018-03-03 21:39:30 -05:00
memory_ldst.inc.c
memory_mapping.c
memory.c memory: Move FlatView allocation to a helper 2018-03-04 02:08:37 -05:00
mips64.h target/mips: Add segmentation control registers 2018-03-04 01:00:42 -05:00
mips64el.h target/mips: Add segmentation control registers 2018-03-04 01:00:42 -05:00
mips.h target/mips: Add segmentation control registers 2018-03-04 01:00:42 -05:00
mipsel.h target/mips: Add segmentation control registers 2018-03-04 01:00:42 -05:00
powerpc.h memory: Rename memory_region_init_rom() and _rom_device() to _nomigrate() 2018-03-03 22:29:01 -05:00
qapi-schema.json qapi: Update scripts to commit 01b2ffcedd94ad7b42bc870e4c6936c87ad03429 2018-03-03 18:32:12 -05:00
qemu-timer.c
rules.mak
softmmu_template.h cputlb: Support generating CPU exceptions on memory transaction failures 2018-03-04 13:14:50 -05:00
sparc64.h memory: Rename memory_region_init_rom() and _rom_device() to _nomigrate() 2018-03-03 22:29:01 -05:00
sparc.h memory: Rename memory_region_init_rom() and _rom_device() to _nomigrate() 2018-03-03 22:29:01 -05:00
tcg-runtime.c tcg: Increase hit rate of lookup_tb_ptr 2018-03-03 17:16:23 -05:00
translate-all.c tcg: Pass generic CPUState to gen_intermediate_code() 2018-03-03 23:34:18 -05:00
translate-all.h
translate-common.c
unicorn_common.h
VERSION
vl.c util: add cacheinfo 2018-03-03 16:58:28 -05:00
vl.h
x86_64.h memory: Rename memory_region_init_rom() and _rom_device() to _nomigrate() 2018-03-03 22:29:01 -05:00