unicorn/qemu
Eric Blake 9aa8356bce
qapi: Adjust names of implicit types
The original choice of ':obj-' as the prefix for implicit types
made it obvious that we weren't going to clash with any user-defined
names, which cannot contain ':'. But now we want to create structs
for implicit types, to get rid of special cases in the generators,
and our use of ':' in implicit names needs a tweak to produce valid
C code.

We could transliterate ':' to '_', except that C99 mandates that
"identifiers that begin with an underscore are always reserved for
use as identifiers with file scope in both the ordinary and tag name
spaces". So it's time to change our naming convention: we can
instead use the 'q_' prefix that we reserved for ourselves back in
commit 9fb081e0. Technically, since we aren't planning on exposing
the empty type in generated code, we could keep the name ':empty',
but renaming it to 'q_empty' makes the check for startswith('q_')
cover all implicit types, whether or not code is generated for them.

As long as we don't declare 'empty' or 'obj' ticklish, it shouldn't
clash with c_name() prepending 'q_' to the user's ticklish names.

Backports commit 7599697c66d22ff4c859ba6ccea30e6a9aae6b9b from qemu
2018-02-21 22:41:38 -05:00
..
crypto
default-configs
docs
fpu softfloat: Remove lingering fast casts 2018-02-20 19:04:22 -05:00
hw qom: Allow properties to be registered against classes 2018-02-21 21:00:56 -05:00
include qapi: Drop QERR_UNKNOWN_BLOCK_FORMAT_FEATURE 2018-02-21 21:55:15 -05:00
qapi qapi: Don't box branches of flat unions 2018-02-20 16:44:55 -05:00
qobject
qom qom: Change object property iterator API contract 2018-02-21 21:03:58 -05:00
scripts qapi: Adjust names of implicit types 2018-02-21 22:41:38 -05:00
target-arm target-arm: Fix translation level on early translation faults 2018-02-21 21:53:15 -05:00
target-i386 target-i386: Dump unknown opcodes with -d unimp 2018-02-21 21:37:16 -05:00
target-m68k tcg: Make store_dummy a TCGv 2018-02-21 00:24:40 -05:00
target-mips tcg: Make cpu_gpr a TCGv array 2018-02-21 01:02:46 -05:00
target-sparc tcg: Make cpu_regs_sparc a TCGv array 2018-02-21 01:50:28 -05:00
tcg tcg: Make cpu_regs_sparc a TCGv array 2018-02-21 01:50:28 -05:00
util error: ensure errno detail is printed with error_abort 2018-02-21 21:40:24 -05:00
aarch64.h target-arm: Implement MRS (banked) and MSR (banked) instructions 2018-02-21 21:50:42 -05:00
aarch64eb.h target-arm: Implement MRS (banked) and MSR (banked) instructions 2018-02-21 21:50:42 -05:00
accel.c
arm.h target-arm: Implement MRS (banked) and MSR (banked) instructions 2018-02-21 21:50:42 -05:00
armeb.h target-arm: Implement MRS (banked) and MSR (banked) instructions 2018-02-21 21:50:42 -05:00
CODING_STYLE
configure
COPYING
COPYING.LIB
cpu-exec-common.c
cpu-exec.c
cpus.c
cputlb.c memory: Drop MemoryRegion.ram_addr 2018-02-21 08:53:08 -05:00
exec.c exec: fix early return from ram_block_add 2018-02-21 21:37:58 -05:00
gen_all_header.sh
glib_compat.c glib_compat: backport hashtable iterator interfaces 2018-02-21 13:18:44 -05:00
HACKING
header_gen.py target-arm: Implement MRS (banked) and MSR (banked) instructions 2018-02-21 21:50:42 -05:00
ioport.c
LICENSE
m68k.h target-arm: Implement MRS (banked) and MSR (banked) instructions 2018-02-21 21:50:42 -05:00
Makefile
Makefile.objs
Makefile.target
memory_mapping.c
memory.c qom: Allow properties to be registered against classes 2018-02-21 21:00:56 -05:00
mips64.h target-arm: Implement MRS (banked) and MSR (banked) instructions 2018-02-21 21:50:42 -05:00
mips64el.h target-arm: Implement MRS (banked) and MSR (banked) instructions 2018-02-21 21:50:42 -05:00
mips.h target-arm: Implement MRS (banked) and MSR (banked) instructions 2018-02-21 21:50:42 -05:00
mipsel.h target-arm: Implement MRS (banked) and MSR (banked) instructions 2018-02-21 21:50:42 -05:00
powerpc.h target-arm: Implement MRS (banked) and MSR (banked) instructions 2018-02-21 21:50:42 -05:00
qapi-schema.json
qemu-log.c
qemu-timer.c
rules.mak
softmmu_template.h
sparc64.h target-arm: Implement MRS (banked) and MSR (banked) instructions 2018-02-21 21:50:42 -05:00
sparc.h target-arm: Implement MRS (banked) and MSR (banked) instructions 2018-02-21 21:50:42 -05:00
tcg-runtime.c
translate-all.c
translate-all.h
translate-common.c
unicorn_common.h
VERSION
vl.c
vl.h
x86_64.h target-arm: Implement MRS (banked) and MSR (banked) instructions 2018-02-21 21:50:42 -05:00