unicorn/qemu/target
Tao Xu b004139ea1
i386: Add new model of Cascadelake-Server
New CPU models mostly inherit features from ancestor Skylake-Server,
while addin new features: AVX512_VNNI, Intel PT.
SSBD support for speculative execution
side channel mitigations.

Note:

On Cascadelake, some capabilities (RDCL_NO, IBRS_ALL, RSBA,
SKIP_L1DFL_VMENTRY and SSB_NO) are enumerated by MSR.
These features rely on MSR based feature support patch.
Will be added later after that patch's in.
http://lists.nongnu.org/archive/html/qemu-devel/2018-09/msg00074.html

Backports commit c7a88b52f62b30c04158eeb07f73e3f72221b6a8 from qemu
2018-11-11 08:08:39 -05:00
..
arm target/arm: Only flush tlb if ASID changes 2018-11-10 11:26:24 -05:00
i386 i386: Add new model of Cascadelake-Server 2018-11-11 08:08:39 -05:00
m68k Removes accessible assert 2018-10-06 05:02:20 -04:00
mips target/mips: Amend MXU ASE overview note 2018-11-11 07:30:31 -05:00
sparc Sparc increase ttl number 2018-10-06 04:55:52 -04:00