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https://github.com/yuzu-emu/unicorn.git
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b2f1326437
We've currently got 18 architectures in QEMU, and thus 18 target-xxx folders in the root folder of the QEMU source tree. More architectures (e.g. RISC-V, AVR) are likely to be included soon, too, so the main folder of the QEMU sources slowly gets quite overcrowded with the target-xxx folders. To disburden the main folder a little bit, let's move the target-xxx folders into a dedicated target/ folder, so that target-xxx/ simply becomes target/xxx/ instead. Backports commit fcf5ef2ab52c621a4617ebbef36bf43b4003f4c0 from qemu
50 lines
1.5 KiB
C
50 lines
1.5 KiB
C
/*
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* ARM load/store instructions for code (armeb-user support)
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*
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* Copyright (c) 2012 CodeSourcery, LLC
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef ARM_LDST_H
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#define ARM_LDST_H
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#include "exec/exec-all.h"
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#include "exec/cpu_ldst.h"
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#include "qemu/bswap.h"
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/* Load an instruction and return it in the standard little-endian order */
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static inline uint32_t arm_ldl_code(CPUARMState *env, target_ulong addr,
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bool sctlr_b)
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{
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uint32_t insn = cpu_ldl_code(env, addr);
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if (bswap_code(sctlr_b)) {
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return bswap32(insn);
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}
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return insn;
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}
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/* Ditto, for a halfword (Thumb) instruction */
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static inline uint16_t arm_lduw_code(CPUARMState *env, target_ulong addr,
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bool sctlr_b)
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{
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uint16_t insn = cpu_lduw_code(env, addr);
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if (bswap_code(sctlr_b)) {
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return bswap16(insn);
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}
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return insn;
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}
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#endif
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