unicorn/qemu/target/riscv
Richard Henderson bca82cde84
tcg: Hoist max_insns computation to tb_gen_code
In order to handle TB's that translate to too much code, we
need to place the control of the length of the translation
in the hands of the code gen master loop.

Backports commit 8b86d6d25807e13a63ab6ea879f976b9f18cc45a from qemu
2019-04-30 09:49:57 -04:00
..
insn_trans target/riscv: Fix wrong expanding for c.fswsp 2019-03-26 20:39:34 -04:00
cpu_bits.h RISC-V: Fixes to CSR_* register macros. 2019-03-19 23:39:49 -04:00
cpu_helper.c RISC-V: Update load reservation comment in do_interrupt 2019-03-19 23:58:31 -04:00
cpu_user.h RISC-V: linux-user support for RVE ABI 2019-03-19 23:58:31 -04:00
cpu.c target/riscv: Remove unused struct 2019-03-19 23:58:31 -04:00
cpu.h RISC-V: linux-user support for RVE ABI 2019-03-19 23:58:31 -04:00
csr.c RISC-V: Add support for vectored interrupts 2019-03-19 23:58:31 -04:00
fpu_helper.c
helper.h
insn16.decode target/riscv: Convert quadrant 2 of RVXC insns to decodetree 2019-03-19 04:53:07 -04:00
insn32-64.decode target/riscv: Convert RV64D insns to decodetree 2019-03-18 16:57:16 -04:00
insn32.decode target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists 2019-03-19 05:17:54 -04:00
instmap.h
Makefile.objs target/riscv: Convert quadrant 0 of RVXC insns to decodetree 2019-03-19 04:45:53 -04:00
op_helper.c
pmp.c riscv: pmp: Log pmp access errors as guest errors 2019-03-19 23:45:03 -04:00
pmp.h
translate.c tcg: Hoist max_insns computation to tb_gen_code 2019-04-30 09:49:57 -04:00
unicorn.c
unicorn.h