Aaron Lindsay b6b0c18ce5 target/arm: Swap PMU values before/after migrations ... Because of the PMU's design, many register accesses have side effects which are inter-related, meaning that the normal method of saving CP registers can result in inconsistent state. These side-effects are largely handled in pmu_op_start/finish functions which can be called before and after the state is saved/restored. By doing this and adding raw read/write functions for the affected registers, we avoid migration-related inconsistencies. Backports relevant parts of commit 980ebe87053792a5bdefaa87777c40914fd4f673 from qemu		2019-01-22 17:01:34 -05:00
..
accel	tcg: Support MMU protection regions smaller than TARGET_PAGE_SIZE	2018-11-16 21:35:54 -05:00
crypto
default-configs
docs
fpu	hardfloat: implement float32/64 comparison	2018-12-19 10:45:22 -05:00
hw
include	qemu/compiler: Define QEMU_NONSTRING	2019-01-22 15:06:09 -05:00
qapi	qapi: Rewrite string-input-visitor's integer and list parsing	2018-12-18 04:57:25 -05:00
qobject
qom
scripts	qapi: fix flat union on uncovered branches conditionals	2018-12-19 10:53:29 -05:00
target	target/arm: Swap PMU values before/after migrations	2019-01-22 17:01:34 -05:00
tcg	tcg: Improve call argument loading	2019-01-05 07:24:08 -05:00
util	qemu-thread: Don't block SEGV, ILL and FPE	2019-01-13 19:50:32 -05:00
aarch64.h	target/arm: Reorganize PMCCNTR accesses	2019-01-22 16:57:29 -05:00
aarch64eb.h	target/arm: Reorganize PMCCNTR accesses	2019-01-22 16:57:29 -05:00
accel.c
arm.h	target/arm: Reorganize PMCCNTR accesses	2019-01-22 16:57:29 -05:00
armeb.h	target/arm: Reorganize PMCCNTR accesses	2019-01-22 16:57:29 -05:00
CODING_STYLE
configure	configure: keep track of Python version	2019-01-22 15:07:59 -05:00
COPYING
COPYING.LIB
cpus.c
exec.c	Partial backport of: exec.c: Handle IOMMUs in address_space_translate_for_iotlb()	2018-11-16 21:24:55 -05:00
gen_all_header.sh
glib_compat.c
HACKING
header_gen.py	target/arm: Reorganize PMCCNTR accesses	2019-01-22 16:57:29 -05:00
ioport.c
LICENSE
m68k.h	target/arm: Reorganize PMCCNTR accesses	2019-01-22 16:57:29 -05:00
Makefile
Makefile.objs
Makefile.target	configure: Remove old -fno-gcse workaround for GCC 4.6.x and 4.7.[012]	2018-12-18 03:52:36 -05:00
memory_ldst.inc.c
memory_mapping.c
memory.c	memory: learn about non-volatile memory region	2018-11-11 08:50:39 -05:00
mips64.h	target/arm: Reorganize PMCCNTR accesses	2019-01-22 16:57:29 -05:00
mips64el.h	target/arm: Reorganize PMCCNTR accesses	2019-01-22 16:57:29 -05:00
mips.h	target/arm: Reorganize PMCCNTR accesses	2019-01-22 16:57:29 -05:00
mipsel.h	target/arm: Reorganize PMCCNTR accesses	2019-01-22 16:57:29 -05:00
powerpc.h	target/arm: Reorganize PMCCNTR accesses	2019-01-22 16:57:29 -05:00
qemu-timer.c
riscv32.h
riscv64.h
rules.mak
sparc64.h	target/arm: Reorganize PMCCNTR accesses	2019-01-22 16:57:29 -05:00
sparc.h	target/arm: Reorganize PMCCNTR accesses	2019-01-22 16:57:29 -05:00
unicorn_common.h
VERSION	Open 4.0 development tree	2018-12-11 20:33:45 -05:00
vl.c
vl.h
x86_64.h	target/arm: Reorganize PMCCNTR accesses	2019-01-22 16:57:29 -05:00