Bastian Koppelmann b9eda7c464 target/riscv: Remove shift and slt insn manual decoding ... Backports commit 34446e845829f55eaa9a07a915950af0b2710b47 from qemu		2019-03-19 05:23:47 -04:00
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insn_trans	target/riscv: Remove shift and slt insn manual decoding	2019-03-19 05:23:47 -04:00
cpu_bits.h	target/riscv: Initial introduction of the RISC-V target	2019-03-08 21:46:10 -05:00
cpu_helper.c
cpu_user.h
cpu.c
cpu.h
csr.c
fpu_helper.c
helper.h
insn16.decode	target/riscv: Convert quadrant 2 of RVXC insns to decodetree	2019-03-19 04:53:07 -04:00
insn32-64.decode	target/riscv: Convert RV64D insns to decodetree	2019-03-18 16:57:16 -04:00
insn32.decode	target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists	2019-03-19 05:17:54 -04:00
instmap.h
Makefile.objs	target/riscv: Convert quadrant 0 of RVXC insns to decodetree	2019-03-19 04:45:53 -04:00
op_helper.c
pmp.c
pmp.h
translate.c	target/riscv: Remove shift and slt insn manual decoding	2019-03-19 05:23:47 -04:00
unicorn.c	target/riscv: Initial introduction of the RISC-V target	2019-03-08 21:46:10 -05:00
unicorn.h