unicorn/qemu/target/riscv
Kito Cheng bd3e9ebaea
RISC-V: linux-user support for RVE ABI
This change checks elf_flags for EF_RISCV_RVE and if
present uses the RVE linux syscall ABI which uses t0
for the syscall number instead of a7.

Warn and exit if a non-RVE ABI binary is run on a
cpu with the RVE extension as it is incompatible.

Backports relevant parts of 5836c3eccedb6dfab16b8f606f2de24b8938b69c
from qemu
2019-03-19 23:58:31 -04:00
..
insn_trans target/riscv: Fix manually parsed 16 bit insn 2019-03-19 05:44:58 -04:00
cpu_bits.h RISC-V: Fixes to CSR_* register macros. 2019-03-19 23:39:49 -04:00
cpu_helper.c RISC-V: Allow interrupt controllers to claim interrupts 2019-03-19 23:48:12 -04:00
cpu_user.h RISC-V: linux-user support for RVE ABI 2019-03-19 23:58:31 -04:00
cpu.c
cpu.h RISC-V: linux-user support for RVE ABI 2019-03-19 23:58:31 -04:00
csr.c RISC-V: Allow interrupt controllers to claim interrupts 2019-03-19 23:48:12 -04:00
fpu_helper.c
helper.h
insn16.decode target/riscv: Convert quadrant 2 of RVXC insns to decodetree 2019-03-19 04:53:07 -04:00
insn32-64.decode target/riscv: Convert RV64D insns to decodetree 2019-03-18 16:57:16 -04:00
insn32.decode target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists 2019-03-19 05:17:54 -04:00
instmap.h
Makefile.objs target/riscv: Convert quadrant 0 of RVXC insns to decodetree 2019-03-19 04:45:53 -04:00
op_helper.c
pmp.c riscv: pmp: Log pmp access errors as guest errors 2019-03-19 23:45:03 -04:00
pmp.h
translate.c target/riscv: Remove decode_RV32_64G() 2019-03-19 05:37:42 -04:00
unicorn.c
unicorn.h