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c21d2062e4
The AArch32 virtualization extensions support these fault address registers: * HDFAR: aliased with AArch64 FAR_EL2[31:0] and AArch32 DFAR(S) * HIFAR: aliased with AArch64 FAR_EL2[63:32] and AArch32 IFAR(S) Implement the accessors for these. This fixes in passing a bug where we weren't implementing the "RES0 from EL3 if EL2 not implemented" behaviour for AArch64 FAR_EL2. Backports commit cba517c31e7df8932c4473c477a0f01d8a0adc48 from qemu |
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.. | ||
arm_ldst.h | ||
arm-powerctl.c | ||
arm-powerctl.h | ||
cpu64.c | ||
cpu-qom.h | ||
cpu.c | ||
cpu.h | ||
crypto_helper.c | ||
helper-a64.c | ||
helper-a64.h | ||
helper-sve.h | ||
helper.c | ||
helper.h | ||
internals.h | ||
iwmmxt_helper.c | ||
kvm-consts.h | ||
Makefile.objs | ||
neon_helper.c | ||
op_addsub.h | ||
op_helper.c | ||
psci.c | ||
sve_helper.c | ||
sve.decode | ||
translate-a64.c | ||
translate-a64.h | ||
translate-sve.c | ||
translate.c | ||
translate.h | ||
unicorn_aarch64.c | ||
unicorn_arm.c | ||
unicorn.h | ||
vec_helper.c |