Peter Maydell c79ebe4965 target/arm: Treat SCTLR_EL1.M as if it were zero when HCR_EL2.TGE is set ... One of the required effects of setting HCR_EL2.TGE is that when SCR_EL3.NS is 1 then SCTLR_EL1.M must behave as if it is zero for all purposes except direct reads. That is, it effectively disables the MMU for the NS EL0/EL1 translation regime. Backports commit 3d0e3080d8b7abcddc038d18e8401861c369c4c1 from qemu		2018-08-16 06:46:09 -04:00
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arm	target/arm: Treat SCTLR_EL1.M as if it were zero when HCR_EL2.TGE is set	2018-08-16 06:46:09 -04:00
i386	i386: implement MSR_SMI_COUNT for TCG	2018-08-02 21:27:08 -04:00
m68k	target/m68k: Merge disas_m68k_insn into m68k_tr_translate_insn	2018-06-15 11:40:18 -04:00
mips	target/mips: Fix data type for offset	2018-07-03 01:01:09 -04:00
sparc	tcg: Pass tb and index to tcg_gen_exit_tb separately	2018-06-07 11:56:32 -04:00