mirror of
https://github.com/yuzu-emu/unicorn.git
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ced1be70e2
Adds the following missing CPUID bits: perfctr-core : core performance counter extensions support. Enables the VM to use extended performance counter support. It enables six programmable counters instead of 4 counters. clzero : instruction zeroes out the 64 byte cache line specified in RAX. xsaveerptr : XSAVE, XSAVE, FXSAVEOPT, XSAVEC, XSAVES always save error pointers and FXRSTOR, XRSTOR, XRSTORS always restore error pointers. ibpb : Indirect Branch Prediction Barrie. xsaves : XSAVES, XRSTORS and IA32_XSS supported. Depends on following kernel commits: 40bc47b08b6e ("kvm: x86: Enumerate support for CLZERO instruction") 504ce1954fba ("KVM: x86: Expose XSAVEERPTR to the guest") 52297436199d ("kvm: svm: Update svm_xsaves_supported") These new features will be added in EPYC-v3. The -cpu help output after the change. x86 EPYC-v1 AMD EPYC Processor x86 EPYC-v2 AMD EPYC Processor (with IBPB) x86 EPYC-v3 AMD EPYC Processor Backports commit a16e8dbc043720abcb37fc7dca313e720b4e0f0c from qemu |
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.. | ||
accel | ||
crypto | ||
default-configs | ||
docs | ||
fpu | ||
hw | ||
include | ||
qapi | ||
qobject | ||
qom | ||
scripts | ||
target | ||
tcg | ||
util | ||
aarch64.h | ||
aarch64eb.h | ||
accel.c | ||
arm.h | ||
armeb.h | ||
CODING_STYLE.rst | ||
configure | ||
COPYING | ||
COPYING.LIB | ||
cpus.c | ||
exec.c | ||
gen_all_header.sh | ||
glib_compat.c | ||
header_gen.py | ||
ioport.c | ||
LICENSE | ||
m68k.h | ||
Makefile | ||
Makefile.objs | ||
Makefile.target | ||
memory_ldst.inc.c | ||
memory_mapping.c | ||
memory.c | ||
mips64.h | ||
mips64el.h | ||
mips.h | ||
mipsel.h | ||
powerpc.h | ||
qemu-timer.c | ||
riscv32.h | ||
riscv64.h | ||
rules.mak | ||
sparc64.h | ||
sparc.h | ||
unicorn_common.h | ||
VERSION | ||
vl.c | ||
vl.h | ||
x86_64.h |