Peter Maydell cfc1611d6f arm: Track M profile handler mode state in TB flags ... For M profile exception-return handling we'd like to generate different code for some instructions depending on whether we are in Handler mode or Thread mode. This isn't the same as "are we privileged or user", so we need an extra bit in the TB flags to distinguish. Backports commit 064c379c99b835bdcc478d21a3849507ea07d53a from qemu		2018-03-02 14:54:16 -05:00
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arm_ldst.h	Fix Thumb-1 BE32 execution and disassembly.	2018-03-02 00:20:11 -05:00
arm-powerctl.c	ARM: Factor out ARM on/off PSCI control functions	2018-03-01 23:31:47 -05:00
arm-powerctl.h	ARM: Factor out ARM on/off PSCI control functions	2018-03-01 23:31:47 -05:00
cpu64.c	target-arm: Enable EL2 feature bit on A53 and A57	2018-03-01 23:36:44 -05:00
cpu-qom.h
cpu.c	armv7m: R14 should reset to 0xffffffff	2018-03-02 13:56:36 -05:00
cpu.h	arm: Track M profile handler mode state in TB flags	2018-03-02 14:54:16 -05:00
crypto_helper.c
helper-a64.c
helper-a64.h
helper.c	arm: Move excnames[] array into arm_log_exceptions()	2018-03-02 14:39:37 -05:00
helper.h
internals.h	arm: Move excnames[] array into arm_log_exceptions()	2018-03-02 14:39:37 -05:00
iwmmxt_helper.c
kvm-consts.h	arm: better stub version for MISMATCH_CHECK	2018-03-02 00:13:45 -05:00
Makefile.objs	ARM: Factor out ARM on/off PSCI control functions	2018-03-01 23:31:47 -05:00
neon_helper.c
op_addsub.h
op_helper.c	target/arm: Add assertion about FSC format for syndrome registers	2018-03-02 14:41:07 -05:00
psci.c	target/arm/psci.c: If EL2 implemented, start CPUs in EL2	2018-03-01 23:34:57 -05:00
translate-a64.c	target/arm: Fix aa64 ldp register writeback	2018-03-02 14:35:46 -05:00
translate.c	arm: Track M profile handler mode state in TB flags	2018-03-02 14:54:16 -05:00
translate.h	arm: Track M profile handler mode state in TB flags	2018-03-02 14:54:16 -05:00
unicorn_aarch64.c
unicorn_arm.c
unicorn.h