unicorn/qemu/target/mips
Richard Henderson eb488f5bd6
tcg: Merge opcode arguments into TCGOp
Rather than have a separate buffer of 10*max_ops entries,
give each opcode 10 entries. The result is actually a bit
smaller and should have slightly more cache locality.

Backports commit 75e8b9b7aa0b95a761b9add7e2f09248b101a392 from qemu
2018-03-05 04:45:20 -05:00
..
cp0_timer.c mips: introduce internal.h and cleanup cpu.h 2018-03-05 00:25:56 -05:00
cpu-qom.h mips: MIPSCPU model subclasses 2018-03-05 00:42:29 -05:00
cpu.c mips: MIPSCPU model subclasses 2018-03-05 00:42:29 -05:00
cpu.h mips: replace cpu_mips_init() with cpu_generic_init() 2018-03-05 00:49:10 -05:00
dsp_helper.c mips: Improve macro parenthesization 2018-03-05 00:51:51 -05:00
helper.c mips: introduce internal.h and cleanup cpu.h 2018-03-05 00:25:56 -05:00
helper.h target/mips: Add segmentation control registers 2018-03-04 01:00:42 -05:00
internal.h mips: MIPSCPU model subclasses 2018-03-05 00:42:29 -05:00
lmi_helper.c
Makefile.objs mips: introduce internal.h and cleanup cpu.h 2018-03-05 00:25:56 -05:00
mips-defs.h
msa_helper.c mips: introduce internal.h and cleanup cpu.h 2018-03-05 00:25:56 -05:00
op_helper.c mips: introduce internal.h and cleanup cpu.h 2018-03-05 00:25:56 -05:00
TODO
translate_init.c mips: MIPSCPU model subclasses 2018-03-05 00:42:29 -05:00
translate.c tcg: Merge opcode arguments into TCGOp 2018-03-05 04:45:20 -05:00
unicorn.c
unicorn.h