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Unicorn CPU emulator framework (ARM, AArch64, M68K, Mips, Sparc, X86)
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Leon Alrae df67716ed5
target/mips: compare virtual addresses in LL/SC sequence 
Do only virtual addresses comaprisons in LL/SC sequence emulations.

Until this patch, physical addresses had been compared in SC part of
LL/SC sequence, even though such comparisons could be avoided. Getting
rid of them allows throwing away SC helpers and having common SC
implementations in user and system mode, avoiding the need for two
separate implementations selected by #ifdef CONFIG_USER_ONLY.

Correct guest software should not rely on LL/SC if they accesses the
same physical address via different virtual addresses or if page
mapping gets changed between LL/SC due to manipulating TLB entries.
MIPS Instruction Set Manual clearly says that an RMW sequence must
use the same address in the LL and SC (virtual address, physical
address, cacheability and coherency attributes must be identical).
Otherwise, the result of the SC is not predictable. This patch takes
advantage of this fact and removes the virtual->physical address
translation from SC helper.

lladdr served as Coprocessor 0 LLAddr register which captures physical
address of the most recent LL instruction, and also lladdr was used
for comparison with following SC physical address. This patch changes
the meaning of lladdr - now it will only keep the virtual address of
the most recent LL. Additionally, CP0_LLAddr field is introduced which
is the actual Coperocessor 0 LLAddr register that guest can access.

Backports commit c7c7e1e9a5e3f0a8a1dbff6e4ccfd21c2dc9f845 from qemu
2019-02-15 16:59:40 -05:00
bindings bindings/README: Add D bindings 2018-10-06 04:51:47 -04:00
docs
include cpu: Convert cpu_index into a bitmap 2018-03-21 08:06:07 -04:00
msvc msvc: Define CONFIG_TCG 2019-01-30 13:52:30 -05:00
qemu target/mips: compare virtual addresses in LL/SC sequence 2019-02-15 16:59:40 -05:00
samples Fuzz 2018-10-06 04:49:11 -04:00
tests Fuzz builds ok 2018-10-06 04:55:02 -04:00
.appveyor.yml
.gitignore qapi: Move qapi-schema.json to qapi/, rename generated files 2018-03-09 11:35:11 -05:00
.travis.yml
AUTHORS.TXT
Brewfile
ChangeLog
config.mk
COPYING
COPYING_GLIB
COPYING.LGPL2
CREDITS.TXT Adding Philippe Antoine to CREDITS 2018-10-06 04:50:10 -04:00
install-cmocka-linux.sh
list.c
make.sh
Makefile Fuzz 2018-10-06 04:49:11 -04:00
msvc.bat
pkgconfig.mk
README.md
uc.c i386: Fix initialization of x86 targets 2018-09-03 09:14:35 -04:00
windows_export.bat

README.md

Unicorn Engine

Join the chat at https://gitter.im/unicorn-engine/chat

Build Status Build status

Unicorn is a lightweight, multi-platform, multi-architecture CPU emulator framework based on QEMU.

Unicorn offers some unparalleled features:

  • Multi-architecture: ARM, ARM64 (ARMv8), M68K, MIPS, SPARC, and X86 (16, 32, 64-bit)
  • Clean/simple/lightweight/intuitive architecture-neutral API
  • Implemented in pure C language, with bindings for Crystal, Clojure, Visual Basic, Perl, Rust, Ruby, Python, Java, .NET, Go, Delphi/Free Pascal and Haskell.
  • Native support for Windows & *nix (with Mac OSX, Linux, *BSD & Solaris confirmed)
  • High performance via Just-In-Time compilation
  • Support for fine-grained instrumentation at various levels
  • Thread-safety by design
  • Distributed under free software license GPLv2

Further information is available at http://www.unicorn-engine.org

License

This project is released under the GPL license.

Compilation & Docs

See docs/COMPILE.md file for how to compile and install Unicorn.

More documentation is available in docs/README.md.

Contact

Contact us via mailing list, email or twitter for any questions.

Contribute

If you want to contribute, please pick up something from our Github issues.

We also maintain a list of more challenged problems in a TODO list.

CREDITS.TXT records important contributors of our project.