unicorn/qemu/target-mips
James Hogan e4903fc5f2
target-mips: Fix RDHWR exception host PC
Commit b00c72180c36 ("target-mips: add PC, XNP reg numbers to RDHWR")
changed the rdhwr helpers to use check_hwrena() to check the register
being accessed is enabled in CP0_HWREna when used from user mode. If
that check fails an EXCP_RI exception is raised at the host PC
calculated with GETPC().

However check_hwrena() may not be fully inlined as the
do_raise_exception() part of it is common regardless of the arguments.
This causes GETPC() to calculate the address in the call in the helper
instead of the generated code calling the helper. No TB will be found
and the EPC reported with the resulting guest RI exception points to the
beginning of the TB instead of the RDHWR instruction.

We can't reliably force check_hwrena() to be inlined, and converting it
to a macro would be ugly, so instead pass the host PC in as an argument,
with each rdhwr helper passing GETPC(). This should avoid any dependence
on compiler behaviour, and in practice seems to ensure the full inlining
of check_hwrena() on x86_64.

This issue causes failures when running a MIPS KVM (trap & emulate)
guest in a MIPS QEMU TCG guest, as the inner guest kernel will do a
RDHWR of counter, which is disabled in the outer guest's CP0_HWREna by
KVM so it can emulate the inner guest's counter. The emulation fails and
the RI exception is passed to the inner guest.

Backports commit d96391c1ffeb30a0afa695c86579517c69d9a889 from qemu
2018-02-23 13:59:37 -05:00
..
cpu-qom.h remove slow cpu QOM casts (#815) 2017-05-02 14:56:39 +08:00
cpu.c include/qemu/osdep.h: Don't include qapi/error.h 2018-02-21 23:08:18 -05:00
cpu.h target-mips: indicate presence of IEEE 754-2008 FPU in R6/R5+MSA CPUs 2018-02-22 11:30:08 -05:00
dsp_helper.c mips: Clean up includes 2018-02-19 00:45:08 -05:00
helper.c mips: Clean up includes 2018-02-19 00:45:08 -05:00
helper.h target-mips: add MAAR, MAARI register 2018-02-22 11:00:17 -05:00
lmi_helper.c mips: Clean up includes 2018-02-19 00:45:08 -05:00
Makefile.objs
mips-defs.h target-mips: fix MIPS64R6-generic configuration 2018-02-17 15:23:21 -05:00
msa_helper.c mips: Clean up includes 2018-02-19 00:45:08 -05:00
op_helper.c target-mips: Fix RDHWR exception host PC 2018-02-23 13:59:37 -05:00
TODO
translate_init.c target-mips: indicate presence of IEEE 754-2008 FPU in R6/R5+MSA CPUs 2018-02-22 11:30:08 -05:00
translate.c target-mips: indicate presence of IEEE 754-2008 FPU in R6/R5+MSA CPUs 2018-02-22 11:30:08 -05:00
unicorn.c tcg: Make cpu_gpr a TCGv array 2018-02-21 01:02:46 -05:00
unicorn.h armeb: rename arm's and mips's *REGS_STORAGE_SIZE to avoid big-endian and little-endian's duplicated definition. 2017-03-15 22:25:35 +08:00