Richard Henderson e54a2b65c0 softfloat: Specialize udiv_qrnnd for ppc64 ... The ISA has a 128/64-bit division instruction, though it assumes the low 64-bits of the numerator are 0, and so requires a bit more fixup than a full 128-bit division insn. Backports commit 27ae5109a2ba8b6b679cce3e03e16570a34390a0 from qemu		2018-10-08 14:15:15 -04:00
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softfloat-macros.h	softfloat: Specialize udiv_qrnnd for ppc64	2018-10-08 14:15:15 -04:00
softfloat-specialize.h	fpu/softfloat: Define floatN_silence_nan in terms of parts_silence_nan	2018-05-20 00:13:42 -04:00
softfloat.c	softfloat: Fix division	2018-10-08 14:15:15 -04:00