unicorn/qemu
Peter Maydell ee9b8a20c9
target/arm: Implement secure function return
Secure function return happens when a non-secure function has been
called using BLXNS and so has a particular magic LR value (either
0xfefffffe or 0xfeffffff). The function return via BX behaves
specially when the new PC value is this magic value, in the same
way that exception returns are handled.

Adjust our BX excret guards so that they recognize the function
return magic number as well, and perform the function-return
unstacking in do_v7m_exception_exit().

Backports commit d02a8698d7ae2bfed3b11fe5b064cb0aa406863b from qemu
2018-03-05 03:33:42 -05:00
..
accel target/arm: [tcg] Port to generic translation framework 2018-03-04 20:28:06 -05:00
crypto
default-configs
docs
fpu
hw mips: replace cpu_mips_init() with cpu_generic_init() 2018-03-05 00:49:10 -05:00
include exec-all: extract tb->tc_* into a separate struct tc_tb 2018-03-05 02:57:22 -05:00
qapi
qobject
qom qom/cpu: move cpu_model null check to cpu_class_by_name() 2018-03-05 02:02:29 -05:00
scripts
target target/arm: Implement secure function return 2018-03-05 03:33:42 -05:00
tcg tcg/mips: delete commented out extern keyword 2018-03-05 03:24:25 -05:00
util bitmap: provide to_le/from_le helpers 2018-03-05 01:11:13 -05:00
aarch64.h target/arm: Implement BLXNS 2018-03-05 03:31:59 -05:00
aarch64eb.h target/arm: Implement BLXNS 2018-03-05 03:31:59 -05:00
accel.c
arm.h target/arm: Implement BLXNS 2018-03-05 03:31:59 -05:00
armeb.h target/arm: Implement BLXNS 2018-03-05 03:31:59 -05:00
atomic_template.h
CODING_STYLE import 2015-08-21 15:04:50 +08:00
configure configure: Drop AIX host support 2018-03-04 21:32:40 -05:00
COPYING
COPYING.LIB
cpu-exec-common.c
cpu-exec.c exec-all: extract tb->tc_* into a separate struct tc_tb 2018-03-05 02:57:22 -05:00
cpus.c
cputlb.c cputlb: Support generating CPU exceptions on memory transaction failures 2018-03-04 13:14:50 -05:00
exec.c memory: Open code FlatView rendering 2018-03-04 02:06:48 -05:00
gen_all_header.sh arm64eb: add support for ARM64 big endian. 2017-04-24 23:30:01 +08:00
glib_compat.c
HACKING
header_gen.py target/arm: Implement BLXNS 2018-03-05 03:31:59 -05:00
ioport.c
LICENSE import 2015-08-21 15:04:50 +08:00
m68k.h target/arm: Implement BLXNS 2018-03-05 03:31:59 -05:00
Makefile
Makefile.objs
Makefile.target tcg: Add generic translation framework 2018-03-04 14:31:16 -05:00
memory_ldst.inc.c
memory_mapping.c
memory.c memory: avoid a name clash with access macro 2018-03-05 01:13:01 -05:00
mips64.h target/arm: Implement BLXNS 2018-03-05 03:31:59 -05:00
mips64el.h target/arm: Implement BLXNS 2018-03-05 03:31:59 -05:00
mips.h target/arm: Implement BLXNS 2018-03-05 03:31:59 -05:00
mipsel.h target/arm: Implement BLXNS 2018-03-05 03:31:59 -05:00
powerpc.h target/arm: Implement BLXNS 2018-03-05 03:31:59 -05:00
qapi-schema.json
qemu-timer.c
rules.mak
softmmu_template.h cputlb: Support generating CPU exceptions on memory transaction failures 2018-03-04 13:14:50 -05:00
sparc64.h target/arm: Implement BLXNS 2018-03-05 03:31:59 -05:00
sparc.h target/arm: Implement BLXNS 2018-03-05 03:31:59 -05:00
tcg-runtime.c exec-all: extract tb->tc_* into a separate struct tc_tb 2018-03-05 02:57:22 -05:00
translate-all.c exec-all: extract tb->tc_* into a separate struct tc_tb 2018-03-05 02:57:22 -05:00
translate-all.h
translate-common.c
unicorn_common.h
VERSION
vl.c
vl.h
x86_64.h target/arm: Implement BLXNS 2018-03-05 03:31:59 -05:00