Jing Liu 61be812bfb x86: Intel AVX512_BF16 feature enabling ... Intel CooperLake cpu adds AVX512_BF16 instruction, defining as CPUID.(EAX=7,ECX=1):EAX[bit 05]. The patch adds a property for setting the subleaf of CPUID leaf 7 in case that people would like to specify it. The release spec link as follows, https://software.intel.com/sites/default/files/managed/c5/15/\ architecture-instruction-set-extensions-programming-reference.pdf Backports commit 80db491da4ce8b199e0e8d1e23943b20aab82f69 from qemu		2019-11-18 22:06:57 -05:00
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arm	target/arm: Use tcg_gen_extrh_i64_i32 to extract the high word	2019-11-18 20:36:19 -05:00
i386	x86: Intel AVX512_BF16 feature enabling	2019-11-18 22:06:57 -05:00
m68k	target/m68k: replace LIT64 with UINT64_C macros	2019-11-18 21:05:59 -05:00
mips	configure: Define target access alignment in configure	2019-11-18 21:41:35 -05:00
riscv	target/riscv: Remove redundant declaration pragmas	2019-11-18 21:22:09 -05:00
sparc	configure: Define target access alignment in configure	2019-11-18 21:41:35 -05:00