mirror of
https://github.com/yuzu-emu/unicorn.git
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e54d0916ef
As per the privilege specification, any access from S/U mode should fail if no pmp region is configured. Backports d102f19a2085ac931cb998e6153b73248cca49f1
7482 lines
194 KiB
Python
7482 lines
194 KiB
Python
#!/usr/bin/python
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# Unicorn Emulator Engine
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# By Dang Hoang Vu & Nguyen Anh Quynh
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# syntax: ./header_gen.py <arm|aarch64|x86|name>
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import sys
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symbols = (
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'ErrorClass_lookup',
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'S0',
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'S1',
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'X86CPURegister32_lookup',
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'_DYNAMIC',
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'_GLOBAL_OFFSET_TABLE_',
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'__jit_debug_descriptor',
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'__jit_debug_register_code',
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'_edata',
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'_end',
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'_fini',
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'_init',
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'a15_l2ctlr_read',
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'a64_translate_init',
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'aa32_generate_debug_exceptions',
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'aa64_cacheop_access',
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'aa64_daif_access',
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'aa64_daif_write',
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'aa64_dczid_read',
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'aa64_fpcr_read',
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'aa64_fpcr_write',
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'aa64_fpsr_read',
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'aa64_fpsr_write',
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'aa64_generate_debug_exceptions',
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'aa64_zva_access',
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'aarch64_banked_spsr_index',
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'aarch64_cpu_register',
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'aarch64_restore_sp',
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'aarch64_save_sp',
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'aarch64_sync_32_to_64',
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'aarch64_sync_64_to_32',
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'aarch64_tb_set_jmp_target',
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'accel_find',
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'accel_init_machine',
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'accel_type',
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'access_with_adjusted_size',
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'add128',
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'add16_sat',
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'add16_usat',
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'add192',
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'add8_sat',
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'add8_usat',
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'addFloat128Sigs',
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'addFloat32Sigs',
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'addFloat64Sigs',
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'addFloatx80Sigs',
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'add_cpreg_to_hashtable',
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'add_cpreg_to_list',
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'add_qemu_ldst_label',
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'address_space_access_valid',
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'address_space_cache_destroy',
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'address_space_cache_init',
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'address_space_cache_invalidate',
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'address_space_destroy',
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'address_space_dispatch_compact',
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'address_space_dispatch_free',
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'address_space_dispatch_new',
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'address_space_get_flatview',
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'address_space_init',
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'address_space_init_dispatch',
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'address_space_get_iotlb_entry',
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'address_space_ldl',
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'address_space_ldl_be',
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'address_space_ldl_be_cached',
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'address_space_ldl_cached',
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'address_space_ldl_le',
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'address_space_ldl_le_cached',
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'address_space_ldq',
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'address_space_ldq_be',
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'address_space_ldq_be_cached',
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'address_space_ldq_cached',
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'address_space_ldq_le',
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'address_space_ldq_le_cached',
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'address_space_ldub',
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'address_space_ldub_cached',
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'address_space_lduw',
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'address_space_lduw_be',
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'address_space_lduw_be_cached',
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'address_space_lduw_cached',
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'address_space_lduw_le',
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'address_space_lduw_le_cached',
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'address_space_lookup_region',
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'address_space_map',
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'address_space_rw',
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'address_space_stb',
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'address_space_stb_cached',
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'address_space_stl',
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'address_space_stl_be',
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'address_space_stl_be_cached',
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'address_space_stl_cached',
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'address_space_stl_le',
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'address_space_stl_le_cached',
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'address_space_stl_notdirty',
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'address_space_stl_notdirty_cached',
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'address_space_stq',
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'address_space_stq_be',
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'address_space_stq_be_cached',
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'address_space_stq_cached',
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'address_space_stq_le',
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'address_space_stq_le_cached',
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'address_space_stw',
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'address_space_stw_be',
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'address_space_stw_be_cached',
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'address_space_stw_cached',
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'address_space_stw_le',
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'address_space_stw_le_cached',
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'address_space_to_dispatch',
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'address_space_to_flatview',
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'address_space_translate_for_iotlb',
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'address_space_translate_internal',
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'address_space_unmap',
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'address_space_unregister',
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'address_space_update_topology',
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'address_space_update_topology_pass',
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'address_space_write',
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'addrrange_contains',
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'addrrange_end',
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'addrrange_equal',
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'addrrange_intersection',
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'addrrange_intersects',
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'addrrange_make',
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'adjust_endianness',
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'all_helpers',
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'alloc_code_gen_buffer',
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'alloc_entry',
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'always_true',
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'arm1026_initfn',
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'arm1136_initfn',
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'arm1136_r2_initfn',
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'arm1176_initfn',
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'arm11mpcore_initfn',
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'arm926_initfn',
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'arm946_initfn',
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'arm_adjust_watchpoint_address',
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'arm_ccnt_enabled',
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'arm_cp_read_zero',
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'arm_cp_reset_ignore',
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'arm_cp_write_ignore',
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'arm_cpu_do_interrupt',
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'arm_cpu_do_transaction_failed',
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'arm_cpu_do_unaligned_access',
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'arm_cpu_exec_interrupt',
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'arm_cpu_finalizefn',
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'arm_cpu_get_phys_page_attrs_debug',
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'arm_cpu_initfn',
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'arm_cpu_list',
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'arm_cpu_post_init',
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'arm_cpu_realizefn',
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'arm_cpu_register',
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'arm_cpu_register_gdb_regs_for_features',
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'arm_cpu_register_types',
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'arm_cpu_set_pc',
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'arm_cpu_update_virq',
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'arm_cpu_update_vfiq',
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'arm_cpus',
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'arm_current_el',
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'arm_dc_feature',
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'arm_debug_check_watchpoint',
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'arm_debug_excp_handler',
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'arm_debug_target_el',
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'arm_el_is_aa64',
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'arm_env_get_cpu',
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'arm_excp_unmasked',
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'arm_feature',
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'arm_free_cc',
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'arm_gen_test_cc',
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'arm_generate_debug_exceptions',
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'arm_gt_htimer_cb',
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'arm_gt_hvtimer_cb',
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'arm_gt_ptimer_cb',
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'arm_gt_stimer_cb',
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'arm_gt_vtimer_cb',
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'arm_handle_psci_call',
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'arm_is_psci_call',
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'arm_is_secure',
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'arm_is_secure_below_el3',
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'arm_jump_cc',
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'arm_ldl_code',
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'arm_lduw_code',
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'arm_log_exception',
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'arm_phys_excp_target_el',
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'arm_reg_read',
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'arm_reg_reset',
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'arm_reg_write',
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'arm_release',
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'arm_rmode_to_sf',
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'arm_s1_regime_using_lpae_format',
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'arm_singlestep_active',
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'arm_test_cc',
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'arm_translate_init',
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'arm_v7m_class_init',
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'arm_v7m_cpu_do_interrupt',
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'ats_access',
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'ats_write',
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'bad_mode_switch',
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'bank_number',
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'bfloat16_squash_input_denormal',
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'bfloat16_add',
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'bfloat16_sub',
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'bfloat16_mul',
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'bfloat16_div',
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'bfloat16_muladd',
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'bfloat16_scalbn',
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'bfloat16_min',
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'bfloat16_max',
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'bfloat16_minnum',
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'bfloat16_maxnum',
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'bfloat16_minnummag',
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'bfloat16_maxnummag',
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'bfloat16_sqrt',
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'bfloat16_compare',
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'bfloat16_compare_quiet',
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'bfloat16_is_quiet_nan',
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'bfloat16_is_signaling_nan',
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'bfloat16_silence_nan',
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'bfloat16_default_nan',
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'bfloat16_to_float32',
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'bfloat16_to_float64',
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'bfloat16_to_int16',
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'bfloat16_to_int16_round_to_zero',
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'bfloat16_to_int16_scalbn',
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'bfloat16_to_int32',
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'bfloat16_to_int32_round_to_zero',
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'bfloat16_to_int32_scalbn',
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'bfloat16_to_int64',
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'bfloat16_to_int64_round_to_zero',
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'bfloat16_to_int64_scalbn',
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'bfloat16_to_uint16',
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'bfloat16_to_uint16_round_to_zero',
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'bfloat16_to_uint16_scalbn',
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'bfloat16_to_uint32',
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'bfloat16_to_uint32_round_to_zero',
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'bfloat16_to_uint32_scalbn',
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'bfloat16_to_uint64',
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'bfloat16_to_uint64_round_to_zero',
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'bfloat16_to_uint64_scalbn',
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'bfloat16_round_to_int',
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'bitmap_zero_extend',
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'bp_wp_matches',
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'breakpoint_invalidate',
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'build_page_bitmap',
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'bus_add_child',
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'bus_class_init',
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'bus_info',
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'bus_unparent',
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'cache_block_ops_cp_reginfo',
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'cache_dirty_status_cp_reginfo',
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'cache_test_clean_cp_reginfo',
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'call_recip_estimate',
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'can_merge',
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'capacity_increase',
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'ccsidr_read',
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'check_ap',
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'check_breakpoints',
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'check_exit_request',
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'check_watchpoints',
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'cho',
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'clear_bit',
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'clz32',
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'clz64',
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'cmp_flatrange_addr',
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'code_gen_alloc',
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'commonNaNToFloat128',
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'commonNaNToFloat16',
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'commonNaNToFloat32',
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'commonNaNToFloat64',
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'commonNaNToFloatx80',
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'compute_abs_deadline',
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'cond_name',
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'configure_accelerator',
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'container_get',
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'container_info',
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'container_register_types',
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'contextidr_write',
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'core_log_global_start',
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'core_log_global_stop',
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'core_memory_listener',
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'cortex_a15_initfn',
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'cortex_a8_initfn',
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'cortex_a9_initfn',
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'cortex_m3_initfn',
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'cortexa15_cp_reginfo',
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'cortexa8_cp_reginfo',
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'cortexa9_cp_reginfo',
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'countLeadingZeros32',
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'countLeadingZeros64',
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'count_cpreg',
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'cp_access_ok',
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'cp_reg_reset',
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'cp_reginfo',
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'cpacr_write',
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'cpreg_field_is_64bit',
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'cpreg_key_compare',
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'cpreg_make_keylist',
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'cpreg_to_kvm_id',
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'cpsr_read',
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'cpsr_write',
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'cptype_valid',
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'cpu_abort',
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'cpu_address_space_init',
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'cpu_breakpoint_insert',
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'cpu_breakpoint_remove',
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'cpu_breakpoint_remove_all',
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'cpu_breakpoint_remove_by_ref',
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'cpu_can_do_io',
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'cpu_can_run',
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'cpu_check_watchpoint',
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'cpu_class_init',
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'cpu_common_class_by_name',
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'cpu_common_exec_interrupt',
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'cpu_common_get_arch_id',
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'cpu_common_get_memory_mapping',
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'cpu_common_get_paging_enabled',
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'cpu_common_has_work',
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'cpu_common_initfn',
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'cpu_common_noop',
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'cpu_common_parse_features',
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'cpu_common_realizefn',
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'cpu_common_reset',
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'cpu_dump_statistics',
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'cpu_exec',
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'cpu_exec_exit',
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'cpu_exec_init',
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'cpu_exec_init_all',
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'cpu_exec_step_atomic',
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'cpu_flush_icache_range',
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'cpu_gen_init',
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'cpu_get_address_space',
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'cpu_get_clock',
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'cpu_get_real_ticks',
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'cpu_get_tb_cpu_state',
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'cpu_handle_debug_exception',
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'cpu_handle_guest_debug',
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'cpu_inb',
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'cpu_inl',
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'cpu_interrupt',
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'cpu_interrupt_handler',
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'cpu_inw',
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'cpu_io_recompile',
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'cpu_is_stopped',
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'cpu_ldl_code',
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'cpu_ldub_code',
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'cpu_lduw_code',
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'cpu_ldub_code',
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'cpu_lduw_code',
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'cpu_ldl_code',
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'cpu_ldq_code',
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'cpu_ldub_mmuidx_ra',
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'cpu_ldsb_mmuidx_ra',
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'cpu_lduw_be_mmuidx_ra',
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'cpu_ldsw_be_mmuidx_ra',
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'cpu_ldl_be_mmuidx_ra',
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'cpu_ldq_be_mmuidx_ra',
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'cpu_lduw_le_mmuidx_ra',
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'cpu_ldsw_le_mmuidx_ra',
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'cpu_ldl_le_mmuidx_ra',
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'cpu_ldq_le_mmuidx_ra',
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'cpu_stb_mmuidx_ra',
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'cpu_stw_be_mmuidx_ra',
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'cpu_stl_be_mmuidx_ra',
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'cpu_stq_be_mmuidx_ra',
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'cpu_stw_le_mmuidx_ra',
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'cpu_stl_le_mmuidx_ra',
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'cpu_stq_le_mmuidx_ra',
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'cpu_ldub_data',
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'cpu_ldsb_data',
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'cpu_lduw_be_data',
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'cpu_ldsw_be_data',
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'cpu_ldl_be_data',
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'cpu_ldq_be_data',
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'cpu_lduw_le_data',
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'cpu_ldsw_le_data',
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'cpu_ldl_le_data',
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'cpu_ldq_le_data',
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'cpu_ldub_data_ra',
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'cpu_ldsb_data_ra',
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'cpu_lduw_be_data_ra',
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'cpu_ldsw_be_data_ra',
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'cpu_ldl_be_data_ra',
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'cpu_ldq_be_data_ra',
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'cpu_lduw_le_data_ra',
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'cpu_ldsw_le_data_ra',
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'cpu_ldl_le_data_ra',
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'cpu_ldq_le_data_ra',
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'cpu_stb_data',
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'cpu_stw_be_data',
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'cpu_stl_be_data',
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'cpu_stq_be_data',
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'cpu_stw_le_data',
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'cpu_stl_le_data',
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'cpu_stq_le_data',
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'cpu_stb_data_ra',
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'cpu_stw_be_data_ra',
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'cpu_stl_be_data_ra',
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'cpu_stq_be_data_ra',
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'cpu_stw_le_data_ra',
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'cpu_stl_le_data_ra',
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'cpu_stq_le_data_ra',
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'cpu_loop_exit',
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'cpu_loop_exit_atomic',
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'cpu_loop_exit_noexc',
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'cpu_loop_exit_restore',
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'cpu_memory_rw_debug',
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'cpu_outb',
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'cpu_outl',
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'cpu_outw',
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'cpu_physical_memory_all_dirty',
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'cpu_physical_memory_clear_dirty_range',
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'cpu_physical_memory_is_clean',
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'cpu_physical_memory_is_io',
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'cpu_physical_memory_map',
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'cpu_physical_memory_range_includes_clean',
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'cpu_physical_memory_reset_dirty',
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'cpu_physical_memory_rw',
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'cpu_physical_memory_unmap',
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'cpu_physical_memory_write_rom',
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'cpu_physical_memory_write_rom_internal',
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'cpu_register',
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'cpu_register_types',
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'cpu_restore_state',
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'cpu_restore_state_from_tb',
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'cpu_single_step',
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'cpu_stb_mmuidx_ra',
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'cpu_tb_exec',
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'cpu_to_be64',
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'cpu_to_le32',
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'cpu_to_le64',
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'cpu_type_info',
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'cpu_unassigned_access',
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'cpu_watchpoint_address_matches',
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'cpu_watchpoint_insert',
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'cpu_watchpoint_remove',
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'cpu_watchpoint_remove_all',
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'cpu_watchpoint_remove_by_ref',
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'crc32c_table',
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'create_new_memory_mapping',
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'csselr_write',
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'cto32',
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'ctr_el0_access',
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'ctz32',
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'ctz64',
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'dacr_write',
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'dbgbcr_write',
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'dbgbvr_write',
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'dbgwcr_write',
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'dbgwvr_write',
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'debug_cp_reginfo',
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'debug_frame',
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'debug_lpae_cp_reginfo',
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'define_arm_cp_regs',
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'define_arm_cp_regs_with_opaque',
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'define_debug_regs',
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'define_one_arm_cp_reg',
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'define_one_arm_cp_reg_with_opaque',
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'deregister_tm_clones',
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'devend_memop',
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'device_class_base_init',
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'device_class_init',
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'device_finalize',
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'device_get_realized',
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'device_initfn',
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'device_post_init',
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'device_reset',
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|
'device_set_realized',
|
|
'device_type_info',
|
|
'disas_arm_insn',
|
|
'disas_coproc_insn',
|
|
'disas_dsp_insn',
|
|
'disas_iwmmxt_insn',
|
|
'disas_neon_data_insn',
|
|
'disas_neon_ls_insn',
|
|
'disas_thumb2_insn',
|
|
'disas_thumb_insn',
|
|
'disas_vfp_insn',
|
|
'disas_vfp_v8_insn',
|
|
'do_arm_semihosting',
|
|
'do_clz16',
|
|
'do_clz8',
|
|
'do_constant_folding',
|
|
'do_constant_folding_2',
|
|
'do_constant_folding_cond',
|
|
'do_constant_folding_cond2',
|
|
'do_constant_folding_cond_32',
|
|
'do_constant_folding_cond_64',
|
|
'do_constant_folding_cond_eq',
|
|
'do_fcvt_f16_to_f32',
|
|
'do_fcvt_f32_to_f16',
|
|
'do_ssat',
|
|
'do_usad',
|
|
'do_usat',
|
|
'do_v7m_exception_exit',
|
|
'dummy_c15_cp_reginfo',
|
|
'dummy_func',
|
|
'dummy_section',
|
|
'dup_const_impl',
|
|
'end_list',
|
|
'ensure_writable_pages',
|
|
'eq128',
|
|
'error_copy',
|
|
'error_exit',
|
|
'error_get_class',
|
|
'error_get_pretty',
|
|
'error_setg_file_open_internal',
|
|
'estimateDiv128To64',
|
|
'estimateSqrt32',
|
|
'excnames',
|
|
'excp_is_internal',
|
|
'extended_addresses_enabled',
|
|
'extended_mpu_ap_bits',
|
|
'extract32',
|
|
'extract64',
|
|
'extractFloat128Exp',
|
|
'extractFloat128Frac0',
|
|
'extractFloat128Frac1',
|
|
'extractFloat128Sign',
|
|
'extractFloat16Exp',
|
|
'extractFloat16Frac',
|
|
'extractFloat16Sign',
|
|
'extractFloat32Exp',
|
|
'extractFloat32Frac',
|
|
'extractFloat32Sign',
|
|
'extractFloat64Exp',
|
|
'extractFloat64Frac',
|
|
'extractFloat64Sign',
|
|
'extractFloatx80Exp',
|
|
'extractFloatx80Frac',
|
|
'extractFloatx80Sign',
|
|
'fcse_write',
|
|
'find_better_copy',
|
|
'find_default_machine',
|
|
'find_desc_by_name',
|
|
'find_first_bit',
|
|
'find_paging_enabled_cpu',
|
|
'find_ram_block',
|
|
'find_ram_offset',
|
|
'find_string',
|
|
'find_type',
|
|
'flatrange_equal',
|
|
'flatview_add_to_dispatch',
|
|
'flatview_destroy',
|
|
'flatview_init',
|
|
'flatview_insert',
|
|
'flatview_lookup',
|
|
'flatview_read',
|
|
'flatview_read_continue',
|
|
'flatview_read_full',
|
|
'flatview_ref',
|
|
'flatview_simplify',
|
|
'flatview_to_dispatch',
|
|
'flatview_translate',
|
|
'flatview_unref',
|
|
'float128ToCommonNaN',
|
|
'float128_add',
|
|
'float128_compare',
|
|
'float128_compare_internal',
|
|
'float128_compare_quiet',
|
|
'float128_default_nan',
|
|
'float128_div',
|
|
'float128_eq',
|
|
'float128_eq_quiet',
|
|
'float128_is_quiet_nan',
|
|
'float128_is_signaling_nan',
|
|
'float128_le',
|
|
'float128_le_quiet',
|
|
'float128_lt',
|
|
'float128_lt_quiet',
|
|
'float128_mul',
|
|
'float128_rem',
|
|
'float128_round_to_int',
|
|
'float128_scalbn',
|
|
'float128_silence_nan',
|
|
'float128_sqrt',
|
|
'float128_sub',
|
|
'float128_to_float32',
|
|
'float128_to_float64',
|
|
'float128_to_floatx80',
|
|
'float128_to_int32',
|
|
'float128_to_int32_round_to_zero',
|
|
'float128_to_int64',
|
|
'float128_to_int64_round_to_zero',
|
|
'float128_to_uint32',
|
|
'float128_to_uint32_round_to_zero',
|
|
'float128_to_uint64',
|
|
'float128_to_uint64_round_to_zero',
|
|
'float128_unordered',
|
|
'float128_unordered_quiet',
|
|
'float16ToCommonNaN',
|
|
'float16_add',
|
|
'float16_compare',
|
|
'float16_compare_quiet',
|
|
'float16_default_nan',
|
|
'float16_div',
|
|
'float16_is_quiet_nan',
|
|
'float16_is_signaling_nan',
|
|
'float16_max',
|
|
'float16_maxnum',
|
|
'float16_maxnummag',
|
|
'float16_min',
|
|
'float16_minnum',
|
|
'float16_minnummag',
|
|
'float16_mul',
|
|
'float16_muladd',
|
|
'float16_round_to_int',
|
|
'float16_scalbn',
|
|
'float16_silence_nan',
|
|
'float16_sqrt',
|
|
'float16_squash_input_denormal',
|
|
'float16_sub',
|
|
'float16_to_int8',
|
|
'float16_to_int8_scalbn',
|
|
'float16_to_int16',
|
|
'float16_to_int16_round_to_zero',
|
|
'float16_to_int16_scalbn',
|
|
'float16_to_int32',
|
|
'float16_to_int32_round_to_zero',
|
|
'float16_to_int32_scalbn',
|
|
'float16_to_int64',
|
|
'float16_to_int64_round_to_zero',
|
|
'float16_to_int64_scalbn',
|
|
'float16_to_float32',
|
|
'float16_to_float64',
|
|
'float16_to_uint8',
|
|
'float16_to_uint8_scalbn',
|
|
'float16_to_uint16',
|
|
'float16_to_uint16_round_to_zero',
|
|
'float16_to_uint16_scalbn',
|
|
'float16_to_uint32',
|
|
'float16_to_uint32_round_to_zero',
|
|
'float16_to_uint32_scalbn',
|
|
'float16_to_uint64',
|
|
'float16_to_uint64_round_to_zero',
|
|
'float16_to_uint64_scalbn',
|
|
'float32ToCommonNaN',
|
|
'float32_abs',
|
|
'float32_add',
|
|
'float32_chs',
|
|
'float32_compare',
|
|
'float32_compare_internal',
|
|
'float32_compare_quiet',
|
|
'float32_default_nan',
|
|
'float32_div',
|
|
'float32_eq',
|
|
'float32_eq_quiet',
|
|
'float32_exp2',
|
|
'float32_exp2_coefficients',
|
|
'float32_is_any_nan',
|
|
'float32_is_infinity',
|
|
'float32_is_neg',
|
|
'float32_is_quiet_nan',
|
|
'float32_is_signaling_nan',
|
|
'float32_is_zero',
|
|
'float32_is_zero_or_denormal',
|
|
'float32_le',
|
|
'float32_le_quiet',
|
|
'float32_log2',
|
|
'float32_lt',
|
|
'float32_lt_quiet',
|
|
'float32_max',
|
|
'float32_maxnum',
|
|
'float32_maxnummag',
|
|
'float32_min',
|
|
'float32_minmax',
|
|
'float32_minnum',
|
|
'float32_minnummag',
|
|
'float32_mul',
|
|
'float32_muladd',
|
|
'float32_rem',
|
|
'float32_round_to_int',
|
|
'float32_scalbn',
|
|
'float32_set_sign',
|
|
'float32_silence_nan',
|
|
'float32_sqrt',
|
|
'float32_squash_input_denormal',
|
|
'float32_sub',
|
|
'float32_to_bfloat16',
|
|
'float32_to_float128',
|
|
'float32_to_float16',
|
|
'float32_to_float64',
|
|
'float32_to_floatx80',
|
|
'float32_to_int16',
|
|
'float32_to_int16_round_to_zero',
|
|
'float32_to_int16_scalbn',
|
|
'float32_to_int32',
|
|
'float32_to_int32_round_to_zero',
|
|
'float32_to_int32_scalbn',
|
|
'float32_to_int64',
|
|
'float32_to_int64_round_to_zero',
|
|
'float32_to_int64_scalbn',
|
|
'float32_to_uint16',
|
|
'float32_to_uint16_round_to_zero',
|
|
'float32_to_uint16_scalbn',
|
|
'float32_to_uint32',
|
|
'float32_to_uint32_round_to_zero',
|
|
'float32_to_uint32_scalbn',
|
|
'float32_to_uint64',
|
|
'float32_to_uint64_round_to_zero',
|
|
'float32_to_uint64_scalbn',
|
|
'float32_unordered',
|
|
'float32_unordered_quiet',
|
|
'float64ToCommonNaN',
|
|
'float64_abs',
|
|
'float64_add',
|
|
'float64_chs',
|
|
'float64_compare',
|
|
'float64_compare_internal',
|
|
'float64_compare_quiet',
|
|
'float64_default_nan',
|
|
'float64_div',
|
|
'float64_eq',
|
|
'float64_eq_quiet',
|
|
'float64_is_any_nan',
|
|
'float64_is_infinity',
|
|
'float64_is_neg',
|
|
'float64_is_quiet_nan',
|
|
'float64_is_signaling_nan',
|
|
'float64_is_zero',
|
|
'float64_le',
|
|
'float64_le_quiet',
|
|
'float64_log2',
|
|
'float64_lt',
|
|
'float64_lt_quiet',
|
|
'float64_max',
|
|
'float64_maxnum',
|
|
'float64_maxnummag',
|
|
'float64_min',
|
|
'float64_minmax',
|
|
'float64_minnum',
|
|
'float64_minnummag',
|
|
'float64_mul',
|
|
'float64_muladd',
|
|
'float64_rem',
|
|
'float64_round_to_int',
|
|
'float64_scalbn',
|
|
'float64_set_sign',
|
|
'float64_silence_nan',
|
|
'float64_sqrt',
|
|
'float64_squash_input_denormal',
|
|
'float64_sub',
|
|
'float64_to_bfloat16',
|
|
'float64_to_float128',
|
|
'float64_to_float16',
|
|
'float64_to_float32',
|
|
'float64_to_floatx80',
|
|
'float64_to_int16',
|
|
'float64_to_int16_round_to_zero',
|
|
'float64_to_int16_scalbn',
|
|
'float64_to_int32',
|
|
'float64_to_int32_round_to_zero',
|
|
'float64_to_int32_scalbn',
|
|
'float64_to_int64',
|
|
'float64_to_int64_round_to_zero',
|
|
'float64_to_int64_scalbn',
|
|
'float64_to_uint16',
|
|
'float64_to_uint16_round_to_zero',
|
|
'float64_to_uint16_scalbn',
|
|
'float64_to_uint32',
|
|
'float64_to_uint32_round_to_zero',
|
|
'float64_to_uint32_scalbn',
|
|
'float64_to_uint64',
|
|
'float64_to_uint64_round_to_zero',
|
|
'float64_to_uint64_scalbn',
|
|
'float64_unordered',
|
|
'float64_unordered_quiet',
|
|
'float_raise',
|
|
'floatx80ToCommonNaN',
|
|
'floatx80_add',
|
|
'floatx80_compare',
|
|
'floatx80_compare_internal',
|
|
'floatx80_compare_quiet',
|
|
'floatx80_default_nan',
|
|
'floatx80_div',
|
|
'floatx80_eq',
|
|
'floatx80_eq_quiet',
|
|
'floatx80_infinity',
|
|
'floatx80_is_quiet_nan',
|
|
'floatx80_is_signaling_nan',
|
|
'floatx80_le',
|
|
'floatx80_le_quiet',
|
|
'floatx80_lt',
|
|
'floatx80_lt_quiet',
|
|
'floatx80_mod',
|
|
'floatx80_modrem',
|
|
'floatx80_mul',
|
|
'floatx80_rem',
|
|
'floatx80_round',
|
|
'floatx80_round_to_int',
|
|
'floatx80_scalbn',
|
|
'floatx80_silence_nan',
|
|
'floatx80_sqrt',
|
|
'floatx80_sub',
|
|
'floatx80_to_float128',
|
|
'floatx80_to_float32',
|
|
'floatx80_to_float64',
|
|
'floatx80_to_int32',
|
|
'floatx80_to_int32_round_to_zero',
|
|
'floatx80_to_int64',
|
|
'floatx80_to_int64_round_to_zero',
|
|
'floatx80_unordered',
|
|
'floatx80_unordered_quiet',
|
|
'flush_icache_range',
|
|
'format_string',
|
|
'fp_decode_rm',
|
|
'frame_dummy',
|
|
'free_code_gen_buffer',
|
|
'free_range',
|
|
'fstat64',
|
|
'futex_wait',
|
|
'futex_wake',
|
|
'g_list_insert_sorted_merged',
|
|
'gen_goto_tb',
|
|
'gen_helper_access_check_cp_reg',
|
|
'gen_helper_check_breakpoints',
|
|
'gen_helper_clear_pstate_ss',
|
|
'gen_helper_cpsr_read',
|
|
'gen_helper_cpsr_write',
|
|
'gen_helper_cpsr_write_eret',
|
|
'gen_helper_get_cp_reg',
|
|
'gen_helper_get_cp_reg64',
|
|
'gen_helper_get_r13_banked',
|
|
'gen_helper_get_user_reg',
|
|
'gen_helper_sel_flags',
|
|
'gen_helper_set_cp_reg',
|
|
'gen_helper_set_cp_reg64',
|
|
'gen_helper_set_neon_rmode',
|
|
'gen_helper_set_r13_banked',
|
|
'gen_helper_set_rmode',
|
|
'gen_helper_set_user_reg',
|
|
'gen_helper_vfp_get_fpscr',
|
|
'gen_helper_vfp_set_fpscr',
|
|
'gen_intermediate_code',
|
|
'gen_lookup_tb',
|
|
'gen_new_label',
|
|
'gen_set_label',
|
|
'gen_step_complete_exception',
|
|
'generate_memory_topology',
|
|
'generic_timer_cp_reginfo',
|
|
'get_arm_cp_reginfo',
|
|
'get_clock',
|
|
'get_clock_realtime',
|
|
'get_constraint_priority',
|
|
'get_float_exception_flags',
|
|
'get_float_rounding_mode',
|
|
'get_fpstatus_ptr',
|
|
'get_level1_table_address',
|
|
'get_mem_index',
|
|
'get_next_param_value',
|
|
'get_opt_name',
|
|
'get_opt_value',
|
|
'get_page_addr_code',
|
|
'get_param_value',
|
|
'get_phys_addr',
|
|
'get_phys_addr_lpae',
|
|
'get_phys_addr_mpu',
|
|
'get_phys_addr_v5',
|
|
'get_phys_addr_v6',
|
|
'get_system_memory',
|
|
'gt_cnt_read',
|
|
'gt_cnt_reset',
|
|
'gt_cntfrq_access',
|
|
'gt_counter_access',
|
|
'gt_ctl_write',
|
|
'gt_cval_write',
|
|
'gt_get_countervalue',
|
|
'gt_pct_access',
|
|
'gt_ptimer_access',
|
|
'gt_recalc_timer',
|
|
'gt_timer_access',
|
|
'gt_tval_read',
|
|
'gt_tval_write',
|
|
'gt_vct_access',
|
|
'gt_vtimer_access',
|
|
'guest_phys_blocks_free',
|
|
'guest_phys_blocks_init',
|
|
'handle_vcvt',
|
|
'handle_vminmaxnm',
|
|
'handle_vrint',
|
|
'handle_vsel',
|
|
'has_help_option',
|
|
'have_avx1',
|
|
'have_avx2',
|
|
'have_bmi1',
|
|
'have_bmi2',
|
|
'have_popcnt',
|
|
'have_movbe',
|
|
'hcr_write',
|
|
'helper_access_check_cp_reg',
|
|
'helper_add_saturate',
|
|
'helper_add_setq',
|
|
'helper_add_usaturate',
|
|
'helper_atomic_add_fetchb',
|
|
'helper_atomic_add_fetchb_mmu',
|
|
'helper_atomic_add_fetchl_be',
|
|
'helper_atomic_add_fetchl_be_mmu',
|
|
'helper_atomic_add_fetchl_le',
|
|
'helper_atomic_add_fetchl_le_mmu',
|
|
'helper_atomic_add_fetchq_be',
|
|
'helper_atomic_add_fetchq_be_mmu',
|
|
'helper_atomic_add_fetchq_le',
|
|
'helper_atomic_add_fetchq_le_mmu',
|
|
'helper_atomic_add_fetchw_be',
|
|
'helper_atomic_add_fetchw_be_mmu',
|
|
'helper_atomic_add_fetchw_le',
|
|
'helper_atomic_add_fetchw_le_mmu',
|
|
'helper_atomic_and_fetchb',
|
|
'helper_atomic_and_fetchb_le_mmu',
|
|
'helper_atomic_and_fetchb_mmu',
|
|
'helper_atomic_and_fetchl_be',
|
|
'helper_atomic_and_fetchl_be_mmu',
|
|
'helper_atomic_and_fetchl_le',
|
|
'helper_atomic_and_fetchl_le_mmu',
|
|
'helper_atomic_and_fetchq_be',
|
|
'helper_atomic_and_fetchq_be_mmu',
|
|
'helper_atomic_and_fetchq_le',
|
|
'helper_atomic_and_fetchq_le_mmu',
|
|
'helper_atomic_and_fetchw_be',
|
|
'helper_atomic_and_fetchw_be_mmu',
|
|
'helper_atomic_and_fetchw_le',
|
|
'helper_atomic_and_fetchw_le_mmu',
|
|
'helper_atomic_cmpxchgb',
|
|
'helper_atomic_cmpxchgb',
|
|
'helper_atomic_cmpxchgb_mmu',
|
|
'helper_atomic_cmpxchgl_be',
|
|
'helper_atomic_cmpxchgl_be_mmu',
|
|
'helper_atomic_cmpxchgl_le',
|
|
'helper_atomic_cmpxchgl_le_mmu',
|
|
'helper_atomic_cmpxchgo_be',
|
|
'helper_atomic_cmpxchgo_be_mmu',
|
|
'helper_atomic_cmpxchgo_le',
|
|
'helper_atomic_cmpxchgo_le_mmu',
|
|
'helper_atomic_cmpxchgq_be',
|
|
'helper_atomic_cmpxchgq_be_mmu',
|
|
'helper_atomic_cmpxchgq_le',
|
|
'helper_atomic_cmpxchgq_le_mmu',
|
|
'helper_atomic_cmpxchgw_be',
|
|
'helper_atomic_cmpxchgw_be_mmu',
|
|
'helper_atomic_cmpxchgw_le',
|
|
'helper_atomic_cmpxchgw_le_mmu',
|
|
'helper_atomic_fetch_addb',
|
|
'helper_atomic_fetch_addb_mmu',
|
|
'helper_atomic_fetch_addl_be',
|
|
'helper_atomic_fetch_addl_be_mmu',
|
|
'helper_atomic_fetch_addl_le',
|
|
'helper_atomic_fetch_addl_le_mmu',
|
|
'helper_atomic_fetch_addq_be',
|
|
'helper_atomic_fetch_addq_be_mmu',
|
|
'helper_atomic_fetch_addq_le',
|
|
'helper_atomic_fetch_addq_le_mmu',
|
|
'helper_atomic_fetch_addw_be',
|
|
'helper_atomic_fetch_addw_be_mmu',
|
|
'helper_atomic_fetch_addw_le',
|
|
'helper_atomic_fetch_addw_le_mmu',
|
|
'helper_atomic_fetch_andb',
|
|
'helper_atomic_fetch_andb_mmu',
|
|
'helper_atomic_fetch_andl_be',
|
|
'helper_atomic_fetch_andl_be_mmu',
|
|
'helper_atomic_fetch_andl_le',
|
|
'helper_atomic_fetch_andl_le_mmu',
|
|
'helper_atomic_fetch_andq_be',
|
|
'helper_atomic_fetch_andq_be_mmu',
|
|
'helper_atomic_fetch_andq_le',
|
|
'helper_atomic_fetch_andq_le_mmu',
|
|
'helper_atomic_fetch_andw_be',
|
|
'helper_atomic_fetch_andw_be_mmu',
|
|
'helper_atomic_fetch_andw_le',
|
|
'helper_atomic_fetch_andw_le_mmu',
|
|
'helper_atomic_fetch_orb',
|
|
'helper_atomic_fetch_orb_mmu',
|
|
'helper_atomic_fetch_orl_be',
|
|
'helper_atomic_fetch_orl_be_mmu',
|
|
'helper_atomic_fetch_orl_le',
|
|
'helper_atomic_fetch_orl_le_mmu',
|
|
'helper_atomic_fetch_orq_be',
|
|
'helper_atomic_fetch_orq_be_mmu',
|
|
'helper_atomic_fetch_orq_le',
|
|
'helper_atomic_fetch_orq_le_mmu',
|
|
'helper_atomic_fetch_orw_be',
|
|
'helper_atomic_fetch_orw_be_mmu',
|
|
'helper_atomic_fetch_orw_le',
|
|
'helper_atomic_fetch_orw_le_mmu',
|
|
'helper_atomic_fetch_smaxb_mmu',
|
|
'helper_atomic_fetch_smaxb',
|
|
'helper_atomic_fetch_smaxl_be_mmu',
|
|
'helper_atomic_fetch_smaxl_be',
|
|
'helper_atomic_fetch_smaxq_be_mmu',
|
|
'helper_atomic_fetch_smaxq_be',
|
|
'helper_atomic_fetch_smaxw_be_mmu',
|
|
'helper_atomic_fetch_smaxw_be',
|
|
'helper_atomic_fetch_sminb_mmu',
|
|
'helper_atomic_fetch_sminb',
|
|
'helper_atomic_fetch_sminl_be_mmu',
|
|
'helper_atomic_fetch_sminl_be',
|
|
'helper_atomic_fetch_sminq_be_mmu',
|
|
'helper_atomic_fetch_sminq_be',
|
|
'helper_atomic_fetch_sminw_be_mmu',
|
|
'helper_atomic_fetch_sminw_be',
|
|
'helper_atomic_fetch_umaxb_mmu',
|
|
'helper_atomic_fetch_umaxb',
|
|
'helper_atomic_fetch_umaxl_be_mmu',
|
|
'helper_atomic_fetch_umaxl_be',
|
|
'helper_atomic_fetch_umaxq_be_mmu',
|
|
'helper_atomic_fetch_umaxq_be',
|
|
'helper_atomic_fetch_umaxw_be_mmu',
|
|
'helper_atomic_fetch_umaxw_be',
|
|
'helper_atomic_fetch_uminb_mmu',
|
|
'helper_atomic_fetch_uminb',
|
|
'helper_atomic_fetch_uminl_be_mmu',
|
|
'helper_atomic_fetch_uminl_be',
|
|
'helper_atomic_fetch_uminq_be_mmu',
|
|
'helper_atomic_fetch_uminq_be',
|
|
'helper_atomic_fetch_uminw_be_mmu',
|
|
'helper_atomic_fetch_uminw_be',
|
|
'helper_atomic_fetch_smaxl_le_mmu',
|
|
'helper_atomic_fetch_smaxl_le',
|
|
'helper_atomic_fetch_smaxq_le_mmu',
|
|
'helper_atomic_fetch_smaxq_le',
|
|
'helper_atomic_fetch_smaxw_le_mmu',
|
|
'helper_atomic_fetch_smaxw_le',
|
|
'helper_atomic_fetch_sminl_le_mmu',
|
|
'helper_atomic_fetch_sminl_le',
|
|
'helper_atomic_fetch_sminq_le_mmu',
|
|
'helper_atomic_fetch_sminq_le',
|
|
'helper_atomic_fetch_sminw_le_mmu',
|
|
'helper_atomic_fetch_sminw_le',
|
|
'helper_atomic_fetch_umaxl_le_mmu',
|
|
'helper_atomic_fetch_umaxl_le',
|
|
'helper_atomic_fetch_umaxq_le_mmu',
|
|
'helper_atomic_fetch_umaxq_le',
|
|
'helper_atomic_fetch_umaxw_le_mmu',
|
|
'helper_atomic_fetch_umaxw_le',
|
|
'helper_atomic_fetch_uminl_le_mmu',
|
|
'helper_atomic_fetch_uminl_le',
|
|
'helper_atomic_fetch_uminq_le_mmu',
|
|
'helper_atomic_fetch_uminq_le',
|
|
'helper_atomic_fetch_uminw_le_mmu',
|
|
'helper_atomic_fetch_uminw_le',
|
|
'helper_atomic_fetch_xorb',
|
|
'helper_atomic_fetch_xorb_mmu',
|
|
'helper_atomic_fetch_xorl_be',
|
|
'helper_atomic_fetch_xorl_be_mmu',
|
|
'helper_atomic_fetch_xorl_le',
|
|
'helper_atomic_fetch_xorl_le_mmu',
|
|
'helper_atomic_fetch_xorq_be',
|
|
'helper_atomic_fetch_xorq_be_mmu',
|
|
'helper_atomic_fetch_xorq_le',
|
|
'helper_atomic_fetch_xorq_le_mmu',
|
|
'helper_atomic_fetch_xorw_be',
|
|
'helper_atomic_fetch_xorw_be_mmu',
|
|
'helper_atomic_fetch_xorw_le',
|
|
'helper_atomic_fetch_xorw_le_mmu',
|
|
'helper_atomic_ldo_be',
|
|
'helper_atomic_ldo_be_mmu',
|
|
'helper_atomic_ldo_le',
|
|
'helper_atomic_ldo_le_mmu',
|
|
'helper_atomic_or_fetchb',
|
|
'helper_atomic_or_fetchb_mmu',
|
|
'helper_atomic_or_fetchl_be',
|
|
'helper_atomic_or_fetchl_be_mmu',
|
|
'helper_atomic_or_fetchl_le',
|
|
'helper_atomic_or_fetchl_le_mmu',
|
|
'helper_atomic_or_fetchq_be',
|
|
'helper_atomic_or_fetchq_be_mmu',
|
|
'helper_atomic_or_fetchq_le',
|
|
'helper_atomic_or_fetchq_le_mmu',
|
|
'helper_atomic_or_fetchw_be',
|
|
'helper_atomic_or_fetchw_be_mmu',
|
|
'helper_atomic_or_fetchw_le',
|
|
'helper_atomic_or_fetchw_le_mmu',
|
|
'helper_atomic_smax_fetchb_mmu',
|
|
'helper_atomic_smax_fetchb',
|
|
'helper_atomic_smax_fetchl_be_mmu',
|
|
'helper_atomic_smax_fetchl_be',
|
|
'helper_atomic_smax_fetchq_be_mmu',
|
|
'helper_atomic_smax_fetchq_be',
|
|
'helper_atomic_smax_fetchw_be_mmu',
|
|
'helper_atomic_smax_fetchw_be',
|
|
'helper_atomic_smin_fetchb_mmu',
|
|
'helper_atomic_smin_fetchb',
|
|
'helper_atomic_smin_fetchl_be_mmu',
|
|
'helper_atomic_smin_fetchl_be',
|
|
'helper_atomic_smin_fetchq_be_mmu',
|
|
'helper_atomic_smin_fetchq_be',
|
|
'helper_atomic_smin_fetchw_be_mmu',
|
|
'helper_atomic_smin_fetchw_be',
|
|
'helper_atomic_smax_fetchl_le_mmu',
|
|
'helper_atomic_smax_fetchl_le',
|
|
'helper_atomic_smax_fetchq_le_mmu',
|
|
'helper_atomic_smax_fetchq_le',
|
|
'helper_atomic_smax_fetchw_le_mmu',
|
|
'helper_atomic_smax_fetchw_le',
|
|
'helper_atomic_smin_fetchl_le_mmu',
|
|
'helper_atomic_smin_fetchl_le',
|
|
'helper_atomic_smin_fetchq_le_mmu',
|
|
'helper_atomic_smin_fetchq_le',
|
|
'helper_atomic_smin_fetchw_le_mmu',
|
|
'helper_atomic_smin_fetchw_le',
|
|
'helper_atomic_sto_be',
|
|
'helper_atomic_sto_be_mmu',
|
|
'helper_atomic_sto_le',
|
|
'helper_atomic_sto_le_mmu',
|
|
'helper_atomic_umax_fetchb_mmu',
|
|
'helper_atomic_umax_fetchb',
|
|
'helper_atomic_umax_fetchl_be_mmu',
|
|
'helper_atomic_umax_fetchl_be',
|
|
'helper_atomic_umax_fetchq_be_mmu',
|
|
'helper_atomic_umax_fetchq_be',
|
|
'helper_atomic_umax_fetchw_be_mmu',
|
|
'helper_atomic_umax_fetchw_be',
|
|
'helper_atomic_umin_fetchb_mmu',
|
|
'helper_atomic_umin_fetchb',
|
|
'helper_atomic_umin_fetchl_be_mmu',
|
|
'helper_atomic_umin_fetchl_be',
|
|
'helper_atomic_umin_fetchq_be_mmu',
|
|
'helper_atomic_umin_fetchq_be',
|
|
'helper_atomic_umin_fetchw_be_mmu',
|
|
'helper_atomic_umin_fetchw_be',
|
|
'helper_atomic_umax_fetchl_le_mmu',
|
|
'helper_atomic_umax_fetchl_le',
|
|
'helper_atomic_umax_fetchq_le_mmu',
|
|
'helper_atomic_umax_fetchq_le',
|
|
'helper_atomic_umax_fetchw_le_mmu',
|
|
'helper_atomic_umax_fetchw_le',
|
|
'helper_atomic_umin_fetchl_le_mmu',
|
|
'helper_atomic_umin_fetchl_le',
|
|
'helper_atomic_umin_fetchq_le_mmu',
|
|
'helper_atomic_umin_fetchq_le',
|
|
'helper_atomic_umin_fetchw_le_mmu',
|
|
'helper_atomic_umin_fetchw_le',
|
|
'helper_atomic_xchgb',
|
|
'helper_atomic_xchgb',
|
|
'helper_atomic_xchgb_mmu',
|
|
'helper_atomic_xchgl_be',
|
|
'helper_atomic_xchgl_be_mmu',
|
|
'helper_atomic_xchgl_le',
|
|
'helper_atomic_xchgl_le_mmu',
|
|
'helper_atomic_xchgq_be',
|
|
'helper_atomic_xchgq_be_mmu',
|
|
'helper_atomic_xchgq_le',
|
|
'helper_atomic_xchgq_le_mmu',
|
|
'helper_atomic_xchgw_be',
|
|
'helper_atomic_xchgw_be_mmu',
|
|
'helper_atomic_xchgw_le',
|
|
'helper_atomic_xchgw_le_mmu',
|
|
'helper_atomic_xor_fetchb',
|
|
'helper_atomic_xor_fetchb_mmu',
|
|
'helper_atomic_xor_fetchl_be',
|
|
'helper_atomic_xor_fetchl_be_mmu',
|
|
'helper_atomic_xor_fetchl_le',
|
|
'helper_atomic_xor_fetchl_le_mmu',
|
|
'helper_atomic_xor_fetchq_be',
|
|
'helper_atomic_xor_fetchq_be_mmu',
|
|
'helper_atomic_xor_fetchq_le',
|
|
'helper_atomic_xor_fetchq_le_mmu',
|
|
'helper_atomic_xor_fetchw_be',
|
|
'helper_atomic_xor_fetchw_be_mmu',
|
|
'helper_atomic_xor_fetchw_le',
|
|
'helper_atomic_xor_fetchw_le_mmu',
|
|
'helper_be_ldl_cmmu',
|
|
'helper_be_ldq_cmmu',
|
|
'helper_be_ldq_mmu',
|
|
'helper_be_ldsl_mmu',
|
|
'helper_be_ldsw_mmu',
|
|
'helper_be_ldul_mmu',
|
|
'helper_be_lduw_mmu',
|
|
'helper_be_ldw_cmmu',
|
|
'helper_be_stl_mmu',
|
|
'helper_be_stq_mmu',
|
|
'helper_be_stw_mmu',
|
|
'helper_check_hcr_el2_trap',
|
|
'helper_clrsb_i32',
|
|
'helper_clrsb_i64',
|
|
'helper_clz_i32',
|
|
'helper_clz_i64',
|
|
'helper_ctpop_i32',
|
|
'helper_ctpop_i64',
|
|
'helper_ctz_i32',
|
|
'helper_ctz_i64',
|
|
'helper_cpsr_read',
|
|
'helper_cpsr_write',
|
|
'helper_cpsr_write_eret',
|
|
'helper_crc32_arm',
|
|
'helper_crc32c',
|
|
'helper_crypto_aese',
|
|
'helper_crypto_aesmc',
|
|
'helper_crypto_rax1',
|
|
'helper_crypto_sha1c',
|
|
'helper_crypto_sha1h',
|
|
'helper_crypto_sha1m',
|
|
'helper_crypto_sha1p',
|
|
'helper_crypto_sha1su0',
|
|
'helper_crypto_sha1su1',
|
|
'helper_crypto_sha256h',
|
|
'helper_crypto_sha256h2',
|
|
'helper_crypto_sha256su0',
|
|
'helper_crypto_sha256su1',
|
|
'helper_crypto_sha512h',
|
|
'helper_crypto_sha512h2',
|
|
'helper_crypto_sha512su0',
|
|
'helper_crypto_sha512su1',
|
|
'helper_crypto_sm3partw1',
|
|
'helper_crypto_sm3partw2',
|
|
'helper_crypto_sm3tt1a',
|
|
'helper_crypto_sm3tt1b',
|
|
'helper_crypto_sm3tt2a',
|
|
'helper_crypto_sm3tt2b',
|
|
'helper_crypto_sm4e',
|
|
'helper_crypto_sm4ekey',
|
|
'helper_dc_zva',
|
|
'helper_div_i32',
|
|
'helper_div_i64',
|
|
'helper_divu_i32',
|
|
'helper_divu_i64',
|
|
'helper_exception_bkpt_insn',
|
|
'helper_exception_internal',
|
|
'helper_exception_return',
|
|
'helper_exception_with_syndrome',
|
|
'helper_exit_atomic',
|
|
'helper_fcos',
|
|
'helper_frint32_d',
|
|
'helper_frint32_s',
|
|
'helper_frint64_d',
|
|
'helper_frint64_s',
|
|
'helper_fscale',
|
|
'helper_fsincos',
|
|
'helper_fsin',
|
|
'helper_fsqrt',
|
|
'helper_get_cp_reg',
|
|
'helper_get_cp_reg64',
|
|
'helper_get_r13_banked',
|
|
'helper_get_user_reg',
|
|
'helper_gvec_abs8',
|
|
'helper_gvec_abs16',
|
|
'helper_gvec_abs32',
|
|
'helper_gvec_abs64',
|
|
'helper_gvec_add8',
|
|
'helper_gvec_add16',
|
|
'helper_gvec_add32',
|
|
'helper_gvec_add64',
|
|
'helper_gvec_adds8',
|
|
'helper_gvec_adds16',
|
|
'helper_gvec_adds32',
|
|
'helper_gvec_adds64',
|
|
'helper_gvec_and',
|
|
'helper_gvec_andc',
|
|
'helper_gvec_ands',
|
|
'helper_gvec_bitsel',
|
|
'helper_gvec_ceq0_b',
|
|
'helper_gvec_ceq0_h',
|
|
'helper_gvec_cge0_b',
|
|
'helper_gvec_cge0_h',
|
|
'helper_gvec_cgt0_b',
|
|
'helper_gvec_cgt0_h',
|
|
'helper_gvec_cle0_b',
|
|
'helper_gvec_cle0_h',
|
|
'helper_gvec_clt0_b',
|
|
'helper_gvec_clt0_h',
|
|
'helper_gvec_dup8',
|
|
'helper_gvec_dup16',
|
|
'helper_gvec_dup32',
|
|
'helper_gvec_dup64',
|
|
'helper_gvec_eq8',
|
|
'helper_gvec_eq16',
|
|
'helper_gvec_eq32',
|
|
'helper_gvec_eq64',
|
|
'helper_gvec_eqv',
|
|
'helper_gvec_facge_h',
|
|
'helper_gvec_facge_s',
|
|
'helper_gvec_facgt_h',
|
|
'helper_gvec_facgt_s',
|
|
'helper_gvec_fabd_h',
|
|
'helper_gvec_fabd_s',
|
|
'helper_gvec_fadd_d',
|
|
'helper_gvec_fadd_h',
|
|
'helper_gvec_fadd_s',
|
|
'helper_gvec_fcaddh',
|
|
'helper_gvec_fcadds',
|
|
'helper_gvec_fcaddd',
|
|
'helper_gvec_fceq_h',
|
|
'helper_gvec_fceq_s',
|
|
'helper_gvec_fceq0_h',
|
|
'helper_gvec_fceq0_s',
|
|
'helper_gvec_fcge_h',
|
|
'helper_gvec_fcge_s',
|
|
'helper_gvec_fcge0_h',
|
|
'helper_gvec_fcge0_s',
|
|
'helper_gvec_fcgt_h',
|
|
'helper_gvec_fcgt_s',
|
|
'helper_gvec_fcgt0_h',
|
|
'helper_gvec_fcgt0_s',
|
|
'helper_gvec_fcle0_h',
|
|
'helper_gvec_fcle0_s',
|
|
'helper_gvec_fclt0_h',
|
|
'helper_gvec_fclt0_s',
|
|
'helper_gvec_fcmlad',
|
|
'helper_gvec_fcmlah',
|
|
'helper_gvec_fcmlah_idx',
|
|
'helper_gvec_fcmlas',
|
|
'helper_gvec_fcmlas_idx',
|
|
'helper_gvec_fmax_h',
|
|
'helper_gvec_fmax_s',
|
|
'helper_gvec_fmin_h',
|
|
'helper_gvec_fmaxnum_h',
|
|
'helper_gvec_fmaxnum_s',
|
|
'helper_gvec_fmin_s',
|
|
'helper_gvec_fminnum_h',
|
|
'helper_gvec_fminnum_s',
|
|
'helper_gvec_fmla_h',
|
|
'helper_gvec_fmla_s',
|
|
'helper_gvec_fmla_idx_d',
|
|
'helper_gvec_fmla_idx_h',
|
|
'helper_gvec_fmla_idx_s',
|
|
'helper_gvec_fmlal_a32',
|
|
'helper_gvec_fmlal_a64',
|
|
'helper_gvec_fmlal_idx_a32',
|
|
'helper_gvec_fmlal_idx_a64',
|
|
'helper_gvec_fmls_h',
|
|
'helper_gvec_fmls_s',
|
|
'helper_gvec_fmul_d',
|
|
'helper_gvec_fmul_h',
|
|
'helper_gvec_fmul_s',
|
|
'helper_gvec_fmul_idx_d',
|
|
'helper_gvec_fmul_idx_h',
|
|
'helper_gvec_fmul_idx_s',
|
|
'helper_gvec_frecpe_d',
|
|
'helper_gvec_frecpe_h',
|
|
'helper_gvec_frecpe_s',
|
|
'helper_gvec_frsqrte_d',
|
|
'helper_gvec_frsqrte_h',
|
|
'helper_gvec_frsqrte_s',
|
|
'helper_gvec_fsub_d',
|
|
'helper_gvec_fsub_h',
|
|
'helper_gvec_fsub_s',
|
|
'helper_gvec_ftsmul_d',
|
|
'helper_gvec_ftsmul_h',
|
|
'helper_gvec_ftsmul_s',
|
|
'helper_gvec_le8',
|
|
'helper_gvec_le16',
|
|
'helper_gvec_le32',
|
|
'helper_gvec_le64',
|
|
'helper_gvec_leu8',
|
|
'helper_gvec_leu16',
|
|
'helper_gvec_leu32',
|
|
'helper_gvec_leu64',
|
|
'helper_gvec_lt8',
|
|
'helper_gvec_lt16',
|
|
'helper_gvec_lt32',
|
|
'helper_gvec_lt64',
|
|
'helper_gvec_ltu8',
|
|
'helper_gvec_ltu16',
|
|
'helper_gvec_ltu32',
|
|
'helper_gvec_ltu64',
|
|
'helper_gvec_mov',
|
|
'helper_gvec_mul8',
|
|
'helper_gvec_mul16',
|
|
'helper_gvec_mul32',
|
|
'helper_gvec_mul64',
|
|
'helper_gvec_muls8',
|
|
'helper_gvec_muls16',
|
|
'helper_gvec_muls32',
|
|
'helper_gvec_muls64',
|
|
'helper_gvec_nand',
|
|
'helper_gvec_ne8',
|
|
'helper_gvec_ne16',
|
|
'helper_gvec_ne32',
|
|
'helper_gvec_ne64',
|
|
'helper_gvec_neg8',
|
|
'helper_gvec_neg16',
|
|
'helper_gvec_neg32',
|
|
'helper_gvec_neg64',
|
|
'helper_gvec_nor',
|
|
'helper_gvec_not',
|
|
'helper_gvec_or',
|
|
'helper_gvec_orc',
|
|
'helper_gvec_ors',
|
|
'helper_gvec_pmul_b',
|
|
'helper_gvec_pmull_q',
|
|
'helper_gvec_qrdmlah_s16',
|
|
'helper_gvec_qrdmlah_s32',
|
|
'helper_gvec_qrdmlsh_s16',
|
|
'helper_gvec_qrdmlsh_s32',
|
|
'helper_gvec_recps_nf_h',
|
|
'helper_gvec_recps_nf_s',
|
|
'helper_gvec_rotl8i',
|
|
'helper_gvec_rotl16i',
|
|
'helper_gvec_rotl32i',
|
|
'helper_gvec_rotl64i',
|
|
'helper_gvec_rotl8v',
|
|
'helper_gvec_rotl16v',
|
|
'helper_gvec_rotl32v',
|
|
'helper_gvec_rotl64v',
|
|
'helper_gvec_rotr8v',
|
|
'helper_gvec_rotr16v',
|
|
'helper_gvec_rotr32v',
|
|
'helper_gvec_rotr64v',
|
|
'helper_gvec_rsqrts_nf_h',
|
|
'helper_gvec_rsqrts_nf_s',
|
|
'helper_gvec_sar8i',
|
|
'helper_gvec_sar8v',
|
|
'helper_gvec_sar16i',
|
|
'helper_gvec_sar16v',
|
|
'helper_gvec_sar32i',
|
|
'helper_gvec_sar32v',
|
|
'helper_gvec_sar64i',
|
|
'helper_gvec_sar64v',
|
|
'helper_gvec_sdot_b',
|
|
'helper_gvec_sdot_h',
|
|
'helper_gvec_sdot_idx_b',
|
|
'helper_gvec_sdot_idx_h',
|
|
'helper_gvec_shl8i',
|
|
'helper_gvec_shl8v',
|
|
'helper_gvec_shl16i',
|
|
'helper_gvec_shl16v',
|
|
'helper_gvec_shl32i',
|
|
'helper_gvec_shl32v',
|
|
'helper_gvec_shl64i',
|
|
'helper_gvec_shl64v',
|
|
'helper_gvec_shr8i',
|
|
'helper_gvec_shr8v',
|
|
'helper_gvec_shr16i',
|
|
'helper_gvec_shr16v',
|
|
'helper_gvec_shr32i',
|
|
'helper_gvec_shr32v',
|
|
'helper_gvec_shr64i',
|
|
'helper_gvec_shr64v',
|
|
'helper_gvec_smax8',
|
|
'helper_gvec_smax16',
|
|
'helper_gvec_smax32',
|
|
'helper_gvec_smax64',
|
|
'helper_gvec_smin8',
|
|
'helper_gvec_smin16',
|
|
'helper_gvec_smin32',
|
|
'helper_gvec_smin64',
|
|
'helper_gvec_sqadd_b',
|
|
'helper_gvec_sqadd_d',
|
|
'helper_gvec_sqadd_h',
|
|
'helper_gvec_sqadd_s',
|
|
'helper_gvec_sqsub_b',
|
|
'helper_gvec_sqsub_d',
|
|
'helper_gvec_sqsub_h',
|
|
'helper_gvec_sqsub_s',
|
|
'helper_gvec_sshl_b',
|
|
'helper_gvec_sshl_h',
|
|
'helper_gvec_sub8',
|
|
'helper_gvec_sub16',
|
|
'helper_gvec_sub32',
|
|
'helper_gvec_sub64',
|
|
'helper_gvec_subs8',
|
|
'helper_gvec_subs16',
|
|
'helper_gvec_subs32',
|
|
'helper_gvec_subs64',
|
|
'helper_gvec_ssadd8',
|
|
'helper_gvec_ssadd16',
|
|
'helper_gvec_ssadd32',
|
|
'helper_gvec_ssadd64',
|
|
'helper_gvec_sssub8',
|
|
'helper_gvec_sssub16',
|
|
'helper_gvec_sssub32',
|
|
'helper_gvec_sssub64',
|
|
'helper_gvec_udot_b',
|
|
'helper_gvec_udot_h',
|
|
'helper_gvec_udot_idx_b',
|
|
'helper_gvec_udot_idx_h',
|
|
'helper_gvec_umax8',
|
|
'helper_gvec_umax16',
|
|
'helper_gvec_umax32',
|
|
'helper_gvec_umax64',
|
|
'helper_gvec_umin8',
|
|
'helper_gvec_umin16',
|
|
'helper_gvec_umin32',
|
|
'helper_gvec_umin64',
|
|
'helper_gvec_uqadd_b',
|
|
'helper_gvec_uqadd_d',
|
|
'helper_gvec_uqadd_h',
|
|
'helper_gvec_uqadd_s',
|
|
'helper_gvec_uqsub_b',
|
|
'helper_gvec_uqsub_d',
|
|
'helper_gvec_uqsub_h',
|
|
'helper_gvec_uqsub_s',
|
|
'helper_gvec_usadd8',
|
|
'helper_gvec_usadd16',
|
|
'helper_gvec_usadd32',
|
|
'helper_gvec_usadd64',
|
|
'helper_gvec_ushl_b',
|
|
'helper_gvec_ushl_h',
|
|
'helper_gvec_ussub8',
|
|
'helper_gvec_ussub16',
|
|
'helper_gvec_ussub32',
|
|
'helper_gvec_ussub64',
|
|
'helper_gvec_vfma_h',
|
|
'helper_gvec_vfma_s',
|
|
'helper_gvec_vfms_h',
|
|
'helper_gvec_vfms_s',
|
|
'helper_gvec_xor',
|
|
'helper_gvec_xors',
|
|
'helper_iwmmxt_addcb',
|
|
'helper_iwmmxt_addcl',
|
|
'helper_iwmmxt_addcw',
|
|
'helper_iwmmxt_addnb',
|
|
'helper_iwmmxt_addnl',
|
|
'helper_iwmmxt_addnw',
|
|
'helper_iwmmxt_addsb',
|
|
'helper_iwmmxt_addsl',
|
|
'helper_iwmmxt_addsw',
|
|
'helper_iwmmxt_addub',
|
|
'helper_iwmmxt_addul',
|
|
'helper_iwmmxt_adduw',
|
|
'helper_iwmmxt_align',
|
|
'helper_iwmmxt_avgb0',
|
|
'helper_iwmmxt_avgb1',
|
|
'helper_iwmmxt_avgw0',
|
|
'helper_iwmmxt_avgw1',
|
|
'helper_iwmmxt_bcstb',
|
|
'helper_iwmmxt_bcstl',
|
|
'helper_iwmmxt_bcstw',
|
|
'helper_iwmmxt_cmpeqb',
|
|
'helper_iwmmxt_cmpeql',
|
|
'helper_iwmmxt_cmpeqw',
|
|
'helper_iwmmxt_cmpgtsb',
|
|
'helper_iwmmxt_cmpgtsl',
|
|
'helper_iwmmxt_cmpgtsw',
|
|
'helper_iwmmxt_cmpgtub',
|
|
'helper_iwmmxt_cmpgtul',
|
|
'helper_iwmmxt_cmpgtuw',
|
|
'helper_iwmmxt_insr',
|
|
'helper_iwmmxt_macsw',
|
|
'helper_iwmmxt_macuw',
|
|
'helper_iwmmxt_maddsq',
|
|
'helper_iwmmxt_madduq',
|
|
'helper_iwmmxt_maxsb',
|
|
'helper_iwmmxt_maxsl',
|
|
'helper_iwmmxt_maxsw',
|
|
'helper_iwmmxt_maxub',
|
|
'helper_iwmmxt_maxul',
|
|
'helper_iwmmxt_maxuw',
|
|
'helper_iwmmxt_minsb',
|
|
'helper_iwmmxt_minsl',
|
|
'helper_iwmmxt_minsw',
|
|
'helper_iwmmxt_minub',
|
|
'helper_iwmmxt_minul',
|
|
'helper_iwmmxt_minuw',
|
|
'helper_iwmmxt_msbb',
|
|
'helper_iwmmxt_msbl',
|
|
'helper_iwmmxt_msbw',
|
|
'helper_iwmmxt_muladdsl',
|
|
'helper_iwmmxt_muladdsw',
|
|
'helper_iwmmxt_muladdswl',
|
|
'helper_iwmmxt_mulshw',
|
|
'helper_iwmmxt_mulslw',
|
|
'helper_iwmmxt_muluhw',
|
|
'helper_iwmmxt_mululw',
|
|
'helper_iwmmxt_packsl',
|
|
'helper_iwmmxt_packsq',
|
|
'helper_iwmmxt_packsw',
|
|
'helper_iwmmxt_packul',
|
|
'helper_iwmmxt_packuq',
|
|
'helper_iwmmxt_packuw',
|
|
'helper_iwmmxt_rorl',
|
|
'helper_iwmmxt_rorq',
|
|
'helper_iwmmxt_rorw',
|
|
'helper_iwmmxt_sadb',
|
|
'helper_iwmmxt_sadw',
|
|
'helper_iwmmxt_setpsr_nz',
|
|
'helper_iwmmxt_shufh',
|
|
'helper_iwmmxt_slll',
|
|
'helper_iwmmxt_sllq',
|
|
'helper_iwmmxt_sllw',
|
|
'helper_iwmmxt_sral',
|
|
'helper_iwmmxt_sraq',
|
|
'helper_iwmmxt_sraw',
|
|
'helper_iwmmxt_srll',
|
|
'helper_iwmmxt_srlq',
|
|
'helper_iwmmxt_srlw',
|
|
'helper_iwmmxt_subnb',
|
|
'helper_iwmmxt_subnl',
|
|
'helper_iwmmxt_subnw',
|
|
'helper_iwmmxt_subsb',
|
|
'helper_iwmmxt_subsl',
|
|
'helper_iwmmxt_subsw',
|
|
'helper_iwmmxt_subub',
|
|
'helper_iwmmxt_subul',
|
|
'helper_iwmmxt_subuw',
|
|
'helper_iwmmxt_unpackhb',
|
|
'helper_iwmmxt_unpackhl',
|
|
'helper_iwmmxt_unpackhsb',
|
|
'helper_iwmmxt_unpackhsl',
|
|
'helper_iwmmxt_unpackhsw',
|
|
'helper_iwmmxt_unpackhub',
|
|
'helper_iwmmxt_unpackhul',
|
|
'helper_iwmmxt_unpackhuw',
|
|
'helper_iwmmxt_unpackhw',
|
|
'helper_iwmmxt_unpacklb',
|
|
'helper_iwmmxt_unpackll',
|
|
'helper_iwmmxt_unpacklsb',
|
|
'helper_iwmmxt_unpacklsl',
|
|
'helper_iwmmxt_unpacklsw',
|
|
'helper_iwmmxt_unpacklub',
|
|
'helper_iwmmxt_unpacklul',
|
|
'helper_iwmmxt_unpackluw',
|
|
'helper_iwmmxt_unpacklw',
|
|
'helper_ldb_cmmu',
|
|
'helper_ldb_mmu',
|
|
'helper_ldl_cmmu',
|
|
'helper_ldl_mmu',
|
|
'helper_ldq_cmmu',
|
|
'helper_ldq_mmu',
|
|
'helper_ldw_cmmu',
|
|
'helper_ldw_mmu',
|
|
'helper_le_ldl_cmmu',
|
|
'helper_le_ldq_cmmu',
|
|
'helper_le_ldq_mmu',
|
|
'helper_le_ldsl_mmu',
|
|
'helper_le_ldsw_mmu',
|
|
'helper_le_ldul_mmu',
|
|
'helper_le_lduw_mmu',
|
|
'helper_le_ldw_cmmu',
|
|
'helper_le_stl_mmu',
|
|
'helper_le_stq_mmu',
|
|
'helper_le_stw_mmu',
|
|
'helper_lookup_tb_ptr',
|
|
'helper_mulsh_i32',
|
|
'helper_mulsh_i64',
|
|
'helper_muluh_i32',
|
|
'helper_muluh_i64',
|
|
'helper_mrs_banked',
|
|
'helper_msa_ld_b',
|
|
'helper_msa_ld_d',
|
|
'helper_msa_ld_h',
|
|
'helper_msa_ld_w',
|
|
'helper_msa_st_b',
|
|
'helper_msa_st_d',
|
|
'helper_msa_st_h',
|
|
'helper_msa_st_w',
|
|
'helper_msr_banked',
|
|
'helper_neon_abdl_s16',
|
|
'helper_neon_abdl_s32',
|
|
'helper_neon_abdl_s64',
|
|
'helper_neon_abdl_u16',
|
|
'helper_neon_abdl_u32',
|
|
'helper_neon_abdl_u64',
|
|
'helper_neon_acge_f32',
|
|
'helper_neon_acge_f64',
|
|
'helper_neon_acgt_f32',
|
|
'helper_neon_acgt_f64',
|
|
'helper_neon_add_u16',
|
|
'helper_neon_add_u8',
|
|
'helper_neon_addl_saturate_s32',
|
|
'helper_neon_addl_saturate_s64',
|
|
'helper_neon_addl_u16',
|
|
'helper_neon_addl_u32',
|
|
'helper_neon_ceq_f32',
|
|
'helper_neon_cge_f32',
|
|
'helper_neon_cgt_f32',
|
|
'helper_neon_cls_s16',
|
|
'helper_neon_cls_s32',
|
|
'helper_neon_cls_s8',
|
|
'helper_neon_clz_u16',
|
|
'helper_neon_clz_u8',
|
|
'helper_neon_cnt_u8',
|
|
'helper_neon_fcvt_f16_to_f32',
|
|
'helper_neon_fcvt_f32_to_f16',
|
|
'helper_neon_hadd_s16',
|
|
'helper_neon_hadd_s32',
|
|
'helper_neon_hadd_s8',
|
|
'helper_neon_hadd_u16',
|
|
'helper_neon_hadd_u32',
|
|
'helper_neon_hadd_u8',
|
|
'helper_neon_hsub_s16',
|
|
'helper_neon_hsub_s32',
|
|
'helper_neon_hsub_s8',
|
|
'helper_neon_hsub_u16',
|
|
'helper_neon_hsub_u32',
|
|
'helper_neon_hsub_u8',
|
|
'helper_neon_max_s16',
|
|
'helper_neon_max_s32',
|
|
'helper_neon_max_s8',
|
|
'helper_neon_max_u16',
|
|
'helper_neon_max_u32',
|
|
'helper_neon_max_u8',
|
|
'helper_neon_min_s16',
|
|
'helper_neon_min_s32',
|
|
'helper_neon_min_s8',
|
|
'helper_neon_min_u16',
|
|
'helper_neon_min_u32',
|
|
'helper_neon_min_u8',
|
|
'helper_neon_mul_u16',
|
|
'helper_neon_mul_u8',
|
|
'helper_neon_mull_s16',
|
|
'helper_neon_mull_s8',
|
|
'helper_neon_mull_u16',
|
|
'helper_neon_mull_u8',
|
|
'helper_neon_narrow_high_u16',
|
|
'helper_neon_narrow_high_u8',
|
|
'helper_neon_narrow_round_high_u16',
|
|
'helper_neon_narrow_round_high_u8',
|
|
'helper_neon_narrow_sat_s16',
|
|
'helper_neon_narrow_sat_s32',
|
|
'helper_neon_narrow_sat_s8',
|
|
'helper_neon_narrow_sat_u16',
|
|
'helper_neon_narrow_sat_u32',
|
|
'helper_neon_narrow_sat_u8',
|
|
'helper_neon_narrow_u16',
|
|
'helper_neon_narrow_u8',
|
|
'helper_neon_negl_u16',
|
|
'helper_neon_negl_u32',
|
|
'helper_neon_padd_u16',
|
|
'helper_neon_padd_u8',
|
|
'helper_neon_paddl_u16',
|
|
'helper_neon_paddl_u32',
|
|
'helper_neon_paddh',
|
|
'helper_neon_padds',
|
|
'helper_neon_pmax_s16',
|
|
'helper_neon_pmax_s8',
|
|
'helper_neon_pmax_u16',
|
|
'helper_neon_pmax_u8',
|
|
'helper_neon_pmaxh',
|
|
'helper_neon_pmaxs',
|
|
'helper_neon_pmin_s16',
|
|
'helper_neon_pmin_s8',
|
|
'helper_neon_pmin_u16',
|
|
'helper_neon_pmin_u8',
|
|
'helper_neon_pminh',
|
|
'helper_neon_pmins',
|
|
'helper_neon_pmull_h',
|
|
'helper_neon_qabs_s16',
|
|
'helper_neon_qabs_s32',
|
|
'helper_neon_qabs_s64',
|
|
'helper_neon_qabs_s8',
|
|
'helper_neon_qadd_s16',
|
|
'helper_neon_qadd_s32',
|
|
'helper_neon_qadd_s64',
|
|
'helper_neon_qadd_s8',
|
|
'helper_neon_qadd_u16',
|
|
'helper_neon_qadd_u32',
|
|
'helper_neon_qadd_u64',
|
|
'helper_neon_qadd_u8',
|
|
'helper_neon_qdmulh_s16',
|
|
'helper_neon_qdmulh_s32',
|
|
'helper_neon_qneg_s16',
|
|
'helper_neon_qneg_s32',
|
|
'helper_neon_qneg_s64',
|
|
'helper_neon_qneg_s8',
|
|
'helper_neon_qrdmlah_s16',
|
|
'helper_neon_qrdmlah_s32',
|
|
'helper_neon_qrdmlsh_s16',
|
|
'helper_neon_qrdmlsh_s32',
|
|
'helper_neon_qrdmulh_s16',
|
|
'helper_neon_qrdmulh_s32',
|
|
'helper_neon_qrshl_s16',
|
|
'helper_neon_qrshl_s32',
|
|
'helper_neon_qrshl_s64',
|
|
'helper_neon_qrshl_s8',
|
|
'helper_neon_qrshl_u16',
|
|
'helper_neon_qrshl_u32',
|
|
'helper_neon_qrshl_u64',
|
|
'helper_neon_qrshl_u8',
|
|
'helper_neon_qshl_s16',
|
|
'helper_neon_qshl_s32',
|
|
'helper_neon_qshl_s64',
|
|
'helper_neon_qshl_s8',
|
|
'helper_neon_qshl_u16',
|
|
'helper_neon_qshl_u32',
|
|
'helper_neon_qshl_u64',
|
|
'helper_neon_qshl_u8',
|
|
'helper_neon_qshlu_s16',
|
|
'helper_neon_qshlu_s32',
|
|
'helper_neon_qshlu_s64',
|
|
'helper_neon_qshlu_s8',
|
|
'helper_neon_qsub_s16',
|
|
'helper_neon_qsub_s32',
|
|
'helper_neon_qsub_s64',
|
|
'helper_neon_qsub_s8',
|
|
'helper_neon_qsub_u16',
|
|
'helper_neon_qsub_u32',
|
|
'helper_neon_qsub_u64',
|
|
'helper_neon_qsub_u8',
|
|
'helper_neon_qunzip16',
|
|
'helper_neon_qunzip32',
|
|
'helper_neon_qunzip8',
|
|
'helper_neon_qzip16',
|
|
'helper_neon_qzip32',
|
|
'helper_neon_qzip8',
|
|
'helper_neon_rbit_u8',
|
|
'helper_neon_rhadd_s16',
|
|
'helper_neon_rhadd_s32',
|
|
'helper_neon_rhadd_s8',
|
|
'helper_neon_rhadd_u16',
|
|
'helper_neon_rhadd_u32',
|
|
'helper_neon_rhadd_u8',
|
|
'helper_neon_rshl_s16',
|
|
'helper_neon_rshl_s32',
|
|
'helper_neon_rshl_s64',
|
|
'helper_neon_rshl_s8',
|
|
'helper_neon_rshl_u16',
|
|
'helper_neon_rshl_u32',
|
|
'helper_neon_rshl_u64',
|
|
'helper_neon_rshl_u8',
|
|
'helper_neon_shl_s16',
|
|
'helper_neon_shl_u16',
|
|
'helper_neon_sqadd_u16',
|
|
'helper_neon_sqadd_u32',
|
|
'helper_neon_sqadd_u64',
|
|
'helper_neon_sqadd_u8',
|
|
'helper_neon_sqdmulh_h',
|
|
'helper_neon_sqdmulh_s',
|
|
'helper_neon_sqrdmulh_h',
|
|
'helper_neon_sqrdmulh_s',
|
|
'helper_neon_sub_u16',
|
|
'helper_neon_sub_u8',
|
|
'helper_neon_subl_u16',
|
|
'helper_neon_subl_u32',
|
|
'helper_neon_tbl',
|
|
'helper_neon_tst_u16',
|
|
'helper_neon_tst_u32',
|
|
'helper_neon_tst_u8',
|
|
'helper_neon_unarrow_sat16',
|
|
'helper_neon_unarrow_sat32',
|
|
'helper_neon_unarrow_sat8',
|
|
'helper_neon_unzip16',
|
|
'helper_neon_unzip8',
|
|
'helper_neon_uqadd_s16',
|
|
'helper_neon_uqadd_s32',
|
|
'helper_neon_uqadd_s64',
|
|
'helper_neon_uqadd_s8',
|
|
'helper_neon_widen_s16',
|
|
'helper_neon_widen_s8',
|
|
'helper_neon_widen_u16',
|
|
'helper_neon_widen_u8',
|
|
'helper_neon_zip16',
|
|
'helper_neon_zip8',
|
|
'helper_gvec_sstoh',
|
|
'helper_gvec_sitos',
|
|
'helper_gvec_ustoh',
|
|
'helper_gvec_uitos',
|
|
'helper_gvec_tosszh',
|
|
'helper_gvec_tosizs',
|
|
'helper_gvec_touszh',
|
|
'helper_gvec_touizs',
|
|
'helper_gvec_vcvt_sf',
|
|
'helper_gvec_vcvt_uf',
|
|
'helper_gvec_vcvt_fs',
|
|
'helper_gvec_vcvt_fu',
|
|
'helper_gvec_vcvt_sh',
|
|
'helper_gvec_vcvt_uh',
|
|
'helper_gvec_vcvt_hs',
|
|
'helper_gvec_vcvt_hu',
|
|
'helper_gvec_vcvt_rm_ss',
|
|
'helper_gvec_vcvt_rm_us',
|
|
'helper_gvec_vcvt_rm_sh',
|
|
'helper_gvec_vcvt_rm_uh',
|
|
'helper_gvec_vrint_rm_h',
|
|
'helper_gvec_vrint_rm_s',
|
|
'helper_gvec_vrintx_h',
|
|
'helper_gvec_vrintx_s',
|
|
'helper_gvec_fmla_nf_idx_h',
|
|
'helper_gvec_fmla_nf_idx_s',
|
|
'helper_gvec_fmls_nf_idx_h',
|
|
'helper_gvec_fmls_nf_idx_s',
|
|
'helper_power_down',
|
|
'helper_pre_hvc',
|
|
'helper_pre_smc',
|
|
'helper_qadd16',
|
|
'helper_qadd8',
|
|
'helper_qaddsubx',
|
|
'helper_qsub16',
|
|
'helper_qsub8',
|
|
'helper_qsubaddx',
|
|
'helper_raise_exception',
|
|
'helper_rbit',
|
|
'helper_recpe_f16',
|
|
'helper_recpe_f32',
|
|
'helper_recpe_f64',
|
|
'helper_recpe_u32',
|
|
'helper_recps_f32',
|
|
'helper_rem_i32',
|
|
'helper_rem_i64',
|
|
'helper_remu_i32',
|
|
'helper_remu_i64',
|
|
'helper_ret_ldb_cmmu',
|
|
'helper_ret_ldsb_mmu',
|
|
'helper_ret_ldub_mmu',
|
|
'helper_ret_stb_mmu',
|
|
'helper_rintd',
|
|
'helper_rintd_exact',
|
|
'helper_rinth',
|
|
'helper_rinth_exact',
|
|
'helper_rints',
|
|
'helper_rints_exact',
|
|
'helper_ror_cc',
|
|
'helper_rsqrte_f16',
|
|
'helper_rsqrte_f32',
|
|
'helper_rsqrte_f64',
|
|
'helper_rsqrte_u32',
|
|
'helper_rsqrts_f32',
|
|
'helper_sadd16',
|
|
'helper_sadd8',
|
|
'helper_saddsubx',
|
|
'helper_sar_cc',
|
|
'helper_sar_i32',
|
|
'helper_sar_i64',
|
|
'helper_sdiv',
|
|
'helper_sel_flags',
|
|
'helper_set_cp_reg',
|
|
'helper_set_cp_reg64',
|
|
'helper_set_r13_banked',
|
|
'helper_set_rmode',
|
|
'helper_set_user_reg',
|
|
'helper_setend',
|
|
'helper_shadd16',
|
|
'helper_shadd8',
|
|
'helper_shaddsubx',
|
|
'helper_shl_cc',
|
|
'helper_shl_i64',
|
|
'helper_shr_cc',
|
|
'helper_shr_i32',
|
|
'helper_shr_i64',
|
|
'helper_shsub16',
|
|
'helper_shsub8',
|
|
'helper_shsubaddx',
|
|
'helper_ssat',
|
|
'helper_ssat16',
|
|
'helper_ssub16',
|
|
'helper_ssub8',
|
|
'helper_ssubaddx',
|
|
'helper_stb_mmu',
|
|
'helper_stl_mmu',
|
|
'helper_stq_mmu',
|
|
'helper_stw_mmu',
|
|
'helper_sub_saturate',
|
|
'helper_sub_usaturate',
|
|
'helper_sxtb16',
|
|
'helper_uadd16',
|
|
'helper_uadd8',
|
|
'helper_uaddsubx',
|
|
'helper_udiv',
|
|
'helper_uhadd16',
|
|
'helper_uhadd8',
|
|
'helper_uhaddsubx',
|
|
'helper_uhsub16',
|
|
'helper_uhsub8',
|
|
'helper_uhsubaddx',
|
|
'helper_uqadd16',
|
|
'helper_uqadd8',
|
|
'helper_uqaddsubx',
|
|
'helper_uqsub16',
|
|
'helper_uqsub8',
|
|
'helper_uqsubaddx',
|
|
'helper_usad8',
|
|
'helper_usat',
|
|
'helper_usat16',
|
|
'helper_usub16',
|
|
'helper_usub8',
|
|
'helper_usubaddx',
|
|
'helper_uxtb16',
|
|
'helper_v7m_blxns',
|
|
'helper_v7m_bxns',
|
|
'helper_v7m_preserve_fp_state',
|
|
'helper_v7m_mrs',
|
|
'helper_v7m_msr',
|
|
'helper_v7m_tt',
|
|
'helper_v7m_vlldm',
|
|
'helper_v7m_vlstm',
|
|
'helper_v8m_stackcheck',
|
|
'helper_vfp_absd',
|
|
'helper_vfp_absh',
|
|
'helper_vfp_abss',
|
|
'helper_vfp_addd',
|
|
'helper_vfp_addh',
|
|
'helper_vfp_adds',
|
|
'helper_vfp_cmpd',
|
|
'helper_vfp_cmph_a32',
|
|
'helper_vfp_cmph_a64',
|
|
'helper_vfp_cmped',
|
|
'helper_vfp_cmpeh_a32',
|
|
'helper_vfp_cmpeh_a64',
|
|
'helper_vfp_cmpes',
|
|
'helper_vfp_cmps',
|
|
'helper_vfp_divd',
|
|
'helper_vfp_divh',
|
|
'helper_vfp_divs',
|
|
'helper_vfp_fcvt_f16_to_f32',
|
|
'helper_vfp_fcvt_f16_to_f64',
|
|
'helper_vfp_fcvt_f32_to_f16',
|
|
'helper_vfp_fcvt_f64_to_f16',
|
|
'helper_vfp_fcvtds',
|
|
'helper_vfp_fcvtsd',
|
|
'helper_vfp_get_fpscr',
|
|
'helper_vfp_maxd',
|
|
'helper_vfp_maxh',
|
|
'helper_vfp_maxnumd',
|
|
'helper_vfp_maxnumh',
|
|
'helper_vfp_maxnums',
|
|
'helper_vfp_maxs',
|
|
'helper_vfp_mind',
|
|
'helper_vfp_minh',
|
|
'helper_vfp_minnumd',
|
|
'helper_vfp_minnumh',
|
|
'helper_vfp_minnums',
|
|
'helper_vfp_mins',
|
|
'helper_vfp_muladdd',
|
|
'helper_vfp_muladdh',
|
|
'helper_vfp_muladds',
|
|
'helper_vfp_muld',
|
|
'helper_vfp_mulh',
|
|
'helper_vfp_muls',
|
|
'helper_vfp_negd',
|
|
'helper_vfp_negh',
|
|
'helper_vfp_negs',
|
|
'helper_vfp_set_fpscr',
|
|
'helper_vfp_shtod',
|
|
'helper_vfp_shtoh',
|
|
'helper_vfp_shtos',
|
|
'helper_vfp_sitod',
|
|
'helper_vfp_sitoh',
|
|
'helper_vfp_sitos',
|
|
'helper_vfp_sltod',
|
|
'helper_vfp_sltoh',
|
|
'helper_vfp_sltos',
|
|
'helper_vfp_sqrtd',
|
|
'helper_vfp_sqrth',
|
|
'helper_vfp_sqrts',
|
|
'helper_vfp_sqtod',
|
|
'helper_vfp_sqtoh',
|
|
'helper_vfp_sqtos',
|
|
'helper_vfp_subd',
|
|
'helper_vfp_subh',
|
|
'helper_vfp_subs',
|
|
'helper_vfp_toshd',
|
|
'helper_vfp_toshd_round_to_zero',
|
|
'helper_vfp_toshh',
|
|
'helper_vfp_toshh_round_to_zero',
|
|
'helper_vfp_toshs',
|
|
'helper_vfp_toshs_round_to_zero',
|
|
'helper_vfp_tosid',
|
|
'helper_vfp_tosih',
|
|
'helper_vfp_tosis',
|
|
'helper_vfp_tosizd',
|
|
'helper_vfp_tosizh',
|
|
'helper_vfp_tosizs',
|
|
'helper_vfp_tosld',
|
|
'helper_vfp_tosld_round_to_zero',
|
|
'helper_vfp_toslh',
|
|
'helper_vfp_toslh_round_to_zero',
|
|
'helper_vfp_tosls',
|
|
'helper_vfp_tosls_round_to_zero',
|
|
'helper_vfp_tosqd',
|
|
'helper_vfp_tosqh',
|
|
'helper_vfp_tosqs',
|
|
'helper_vfp_touhd',
|
|
'helper_vfp_touhd_round_to_zero',
|
|
'helper_vfp_touhh',
|
|
'helper_vfp_touhh_round_to_zero',
|
|
'helper_vfp_touhs',
|
|
'helper_vfp_touhs_round_to_zero',
|
|
'helper_vfp_touid',
|
|
'helper_vfp_touih',
|
|
'helper_vfp_touis',
|
|
'helper_vfp_touizd',
|
|
'helper_vfp_touizh',
|
|
'helper_vfp_touizs',
|
|
'helper_vfp_tould',
|
|
'helper_vfp_tould_round_to_zero',
|
|
'helper_vfp_toulh',
|
|
'helper_vfp_toulh_round_to_zero',
|
|
'helper_vfp_touls',
|
|
'helper_vfp_touls_round_to_zero',
|
|
'helper_vfp_touqd',
|
|
'helper_vfp_touqh',
|
|
'helper_vfp_touqs',
|
|
'helper_vfp_uhtod',
|
|
'helper_vfp_uhtoh',
|
|
'helper_vfp_uhtos',
|
|
'helper_vfp_uitod',
|
|
'helper_vfp_uitoh',
|
|
'helper_vfp_uitos',
|
|
'helper_vfp_ultod',
|
|
'helper_vfp_ultoh',
|
|
'helper_vfp_ultos',
|
|
'helper_vfp_uqtod',
|
|
'helper_vfp_uqtoh',
|
|
'helper_vfp_uqtos',
|
|
'helper_vfp_shtos_round_to_nearest',
|
|
'helper_vfp_sltos_round_to_nearest',
|
|
'helper_vfp_uhtos_round_to_nearest',
|
|
'helper_vfp_ultos_round_to_nearest',
|
|
'helper_vfp_shtod_round_to_nearest',
|
|
'helper_vfp_sltod_round_to_nearest',
|
|
'helper_vfp_uhtod_round_to_nearest',
|
|
'helper_vfp_ultod_round_to_nearest',
|
|
'helper_vfp_shtoh_round_to_nearest',
|
|
'helper_vfp_uhtoh_round_to_nearest',
|
|
'helper_vfp_sltoh_round_to_nearest',
|
|
'helper_vfp_ultoh_round_to_nearest',
|
|
'helper_wfe',
|
|
'helper_wfi',
|
|
'helper_yield',
|
|
'hex2decimal',
|
|
'hw_breakpoint_update',
|
|
'hw_breakpoint_update_all',
|
|
'hw_watchpoint_update',
|
|
'hw_watchpoint_update_all',
|
|
'init_cpreg_list',
|
|
'init_lists',
|
|
'input_type_enum',
|
|
'int128_2_64',
|
|
'int128_add',
|
|
'int128_addto',
|
|
'int128_and',
|
|
'int128_eq',
|
|
'int128_ge',
|
|
'int128_get64',
|
|
'int128_gt',
|
|
'int128_le',
|
|
'int128_lt',
|
|
'int128_make64',
|
|
'int128_max',
|
|
'int128_min',
|
|
'int128_ne',
|
|
'int128_neg',
|
|
'int128_nz',
|
|
'int128_rshift',
|
|
'int128_sub',
|
|
'int128_subfrom',
|
|
'int128_zero',
|
|
'int8_to_float16',
|
|
'int16_to_bfloat16',
|
|
'int16_to_bfloat16_scalbn',
|
|
'int16_to_float16',
|
|
'int16_to_float16_scalbn',
|
|
'int16_to_float32',
|
|
'int16_to_float32_scalbn',
|
|
'int16_to_float64',
|
|
'int16_to_float64_scalbn',
|
|
'int32_to_bfloat16',
|
|
'int32_to_bfloat16_scalbn',
|
|
'int32_to_float128',
|
|
'int32_to_float16',
|
|
'int32_to_float16_scalbn',
|
|
'int32_to_float32',
|
|
'int32_to_float32_scalbn',
|
|
'int32_to_float64',
|
|
'int32_to_float64_scalbn',
|
|
'int32_to_floatx80',
|
|
'int64_to_bfloat16',
|
|
'int64_to_bfloat16_scalbn',
|
|
'int64_to_float128',
|
|
'int64_to_float16',
|
|
'int64_to_float16_scalbn',
|
|
'int64_to_float32',
|
|
'int64_to_float32_scalbn',
|
|
'int64_to_float64',
|
|
'int64_to_float64_scalbn',
|
|
'int64_to_floatx80',
|
|
'invalidate_and_set_dirty',
|
|
'invalidate_page_bitmap',
|
|
'io_readb',
|
|
'io_readl',
|
|
'io_readq',
|
|
'io_readw',
|
|
'io_writeb',
|
|
'io_writel',
|
|
'io_writeq',
|
|
'io_writew',
|
|
'iotlb_to_section',
|
|
'is_a64',
|
|
'is_help_option',
|
|
'is_valid_option_list',
|
|
'isr_read',
|
|
'iwmmxt_load_creg',
|
|
'iwmmxt_load_reg',
|
|
'iwmmxt_store_creg',
|
|
'iwmmxt_store_reg',
|
|
'kvm_to_cpreg_id',
|
|
'last_ram_offset',
|
|
'ldl_be_p',
|
|
'ldl_be_phys',
|
|
'ldl_be_phys_cached',
|
|
'ldl_he_p',
|
|
'ldl_le_p',
|
|
'ldl_le_phys',
|
|
'ldl_le_phys_cached',
|
|
'ldl_phys',
|
|
'ldl_phys_cached',
|
|
'ldl_phys_internal',
|
|
'ldq_be_p',
|
|
'ldq_be_phys',
|
|
'ldq_be_phys_cached',
|
|
'ldq_he_p',
|
|
'ldq_le_p',
|
|
'ldq_le_phys',
|
|
'ldq_le_phys_cached',
|
|
'ldq_phys',
|
|
'ldq_phys_cached',
|
|
'ldq_phys_internal',
|
|
'ldst_name',
|
|
'ldub_p',
|
|
'ldub_phys',
|
|
'ldub_phys_cached',
|
|
'lduw_be_p',
|
|
'lduw_be_phys',
|
|
'lduw_be_phys_cached',
|
|
'lduw_he_p',
|
|
'lduw_le_p',
|
|
'lduw_le_phys',
|
|
'lduw_le_phys_cached',
|
|
'lduw_phys',
|
|
'lduw_phys_cached',
|
|
'lduw_phys_internal',
|
|
'le128',
|
|
'linked_bp_matches',
|
|
'listener_add_address_space',
|
|
'load_cpu_offset',
|
|
'load_reg',
|
|
'load_reg_var',
|
|
'log_cpu_state',
|
|
'lpae_cp_reginfo',
|
|
'lt128',
|
|
'machine_class_init',
|
|
'machine_finalize',
|
|
'machine_info',
|
|
'machine_initfn',
|
|
'machine_register_types',
|
|
'machvirt_init',
|
|
'machvirt_machine_init',
|
|
'maj',
|
|
'mapping_conflict',
|
|
'mapping_contiguous',
|
|
'mapping_have_same_region',
|
|
'mapping_merge',
|
|
'memory_access_size',
|
|
'memory_free',
|
|
'memory_init',
|
|
'memory_listener_match',
|
|
'memory_listener_register',
|
|
'memory_listener_unregister',
|
|
'memory_map',
|
|
'memory_map_init',
|
|
'memory_map_ptr',
|
|
'memory_mapping_filter',
|
|
'memory_mapping_list_add_mapping_sorted',
|
|
'memory_mapping_list_add_merge_sorted',
|
|
'memory_mapping_list_free',
|
|
'memory_mapping_list_init',
|
|
'memory_region_access_valid',
|
|
'memory_region_add_subregion',
|
|
'memory_region_add_subregion_common',
|
|
'memory_region_add_subregion_overlap',
|
|
'memory_region_big_endian',
|
|
'memory_region_clear_global_locking',
|
|
'memory_region_clear_pending',
|
|
'memory_region_del_subregion',
|
|
'memory_region_destructor_alias',
|
|
'memory_region_destructor_none',
|
|
'memory_region_destructor_ram',
|
|
'memory_region_destructor_ram_from_ptr',
|
|
'memory_region_dispatch_read',
|
|
'memory_region_dispatch_read1',
|
|
'memory_region_dispatch_write',
|
|
'memory_region_do_writeback',
|
|
'memory_region_escape_name',
|
|
'memory_region_finalize',
|
|
'memory_region_find',
|
|
'memory_region_from_host',
|
|
'memory_region_get_addr',
|
|
'memory_region_get_alignment',
|
|
'memory_region_get_container',
|
|
'memory_region_get_dirty_log_mask',
|
|
'memory_region_get_fd',
|
|
'memory_region_get_may_overlap',
|
|
'memory_region_get_priority',
|
|
'memory_region_get_ram_addr',
|
|
'memory_region_get_ram_ptr',
|
|
'memory_region_get_size',
|
|
'memory_region_info',
|
|
'memory_region_init',
|
|
'memory_region_init_alias',
|
|
'memory_region_init_io',
|
|
'memory_region_init_ram_device_ptr',
|
|
'memory_region_init_ram_nomigrate',
|
|
'memory_region_init_ram_ptr',
|
|
'memory_region_init_reservation',
|
|
'memory_region_init_resizeable_ram',
|
|
'memory_region_init_rom_nomigrate',
|
|
'memory_region_initfn',
|
|
'memory_region_is_logging',
|
|
'memory_region_is_mapped',
|
|
'memory_region_is_ram_device',
|
|
'memory_region_is_unassigned',
|
|
'memory_region_name',
|
|
'memory_region_need_escape',
|
|
'memory_region_oldmmio_read_accessor',
|
|
'memory_region_oldmmio_write_accessor',
|
|
'memory_region_present',
|
|
'memory_region_read_accessor',
|
|
'memory_region_readd_subregion',
|
|
'memory_region_ref',
|
|
'memory_region_resolve_container',
|
|
'memory_region_rom_device_set_romd',
|
|
'memory_region_section_get_iotlb',
|
|
'memory_region_set_address',
|
|
'memory_region_set_alias_offset',
|
|
'memory_region_set_enabled',
|
|
'memory_region_set_nonvolatile',
|
|
'memory_region_set_readonly',
|
|
'memory_region_set_size',
|
|
'memory_region_size',
|
|
'memory_region_to_address_space',
|
|
'memory_region_transaction_begin',
|
|
'memory_region_transaction_commit',
|
|
'memory_region_unref',
|
|
'memory_region_update_container_subregions',
|
|
'memory_region_write_accessor',
|
|
'memory_region_wrong_endianness',
|
|
'memory_register_types',
|
|
'memory_try_enable_merging',
|
|
'memory_unmap',
|
|
'modify_arm_cp_regs',
|
|
'module_call_init',
|
|
'module_load',
|
|
'mpidr_cp_reginfo',
|
|
'mpidr_read',
|
|
'msr_mask',
|
|
'mul128By64To192',
|
|
'mul128To256',
|
|
'mul64To128',
|
|
'muldiv64',
|
|
'neon_2rm_is_float_op',
|
|
'neon_2rm_sizes',
|
|
'neon_3r_sizes',
|
|
'neon_get_scalar',
|
|
'neon_load_reg',
|
|
'neon_load_reg64',
|
|
'neon_load_scratch',
|
|
'neon_ls_element_type',
|
|
'neon_reg_offset',
|
|
'neon_store_reg',
|
|
'neon_store_reg64',
|
|
'neon_store_scratch',
|
|
'new_ldst_label',
|
|
'next_list',
|
|
'normalizeFloat128Subnormal',
|
|
'normalizeFloat16Subnormal',
|
|
'normalizeFloat32Subnormal',
|
|
'normalizeFloat64Subnormal',
|
|
'normalizeFloatx80Subnormal',
|
|
'normalizeRoundAndPackFloat128',
|
|
'normalizeRoundAndPackFloat32',
|
|
'normalizeRoundAndPackFloat64',
|
|
'normalizeRoundAndPackFloatx80',
|
|
'not_v6_cp_reginfo',
|
|
'not_v7_cp_reginfo',
|
|
'not_v8_cp_reginfo',
|
|
'object_child_foreach',
|
|
'object_child_foreach_recursive',
|
|
'object_class_foreach',
|
|
'object_class_foreach_tramp',
|
|
'object_class_get_list',
|
|
'object_class_get_list_sorted',
|
|
'object_class_get_list_tramp',
|
|
'object_class_get_parent',
|
|
'object_deinit',
|
|
'object_dynamic_cast',
|
|
'object_finalize',
|
|
'object_finalize_child_property',
|
|
'object_get_child_property',
|
|
'object_get_internal_root',
|
|
'object_get_link_property',
|
|
'object_get_root',
|
|
'object_init_with_type',
|
|
'object_initialize_with_type',
|
|
'object_instance_init',
|
|
'object_new_with_type',
|
|
'object_post_init_with_type',
|
|
'object_property_add_alias',
|
|
'object_property_add_link',
|
|
'object_property_add_uint16_ptr',
|
|
'object_property_add_uint32_ptr',
|
|
'object_property_add_uint64_ptr',
|
|
'object_property_add_uint8_ptr',
|
|
'object_property_allow_set_link',
|
|
'object_property_del',
|
|
'object_property_del_all',
|
|
'object_property_find',
|
|
'object_property_get',
|
|
'object_property_get_bool',
|
|
'object_property_get_int',
|
|
'object_property_get_link',
|
|
'object_property_get_qobject',
|
|
'object_property_get_str',
|
|
'object_property_get_type',
|
|
'object_property_is_child',
|
|
'object_property_set',
|
|
'object_property_set_description',
|
|
'object_property_set_link',
|
|
'object_property_set_qobject',
|
|
'object_release_link_property',
|
|
'object_resolve_abs_path',
|
|
'object_resolve_child_property',
|
|
'object_resolve_link',
|
|
'object_resolve_link_property',
|
|
'object_resolve_partial_path',
|
|
'object_resolve_path',
|
|
'object_resolve_path_component',
|
|
'object_resolve_path_type',
|
|
'object_set_link_property',
|
|
'object_type_get_instance_size',
|
|
'omap_cachemaint_write',
|
|
'omap_cp_reginfo',
|
|
'omap_threadid_write',
|
|
'omap_ticonfig_write',
|
|
'omap_wfi_write',
|
|
'op_bits',
|
|
'op_to_mov',
|
|
'op_to_movi',
|
|
'open_modeflags',
|
|
'output_type_enum',
|
|
'packFloat128',
|
|
'packFloat16',
|
|
'packFloat32',
|
|
'packFloat64',
|
|
'packFloatx80',
|
|
'page_find',
|
|
'page_find_alloc',
|
|
'page_flush_tb',
|
|
'page_flush_tb_1',
|
|
'page_init',
|
|
'page_size_init',
|
|
'par_write',
|
|
'parse_array',
|
|
'parse_cpu_model',
|
|
'parse_error',
|
|
'parse_escape',
|
|
'parse_keyword',
|
|
'parse_literal',
|
|
'parse_object',
|
|
'parse_option_bool',
|
|
'parse_option_number',
|
|
'parse_option_size',
|
|
'parse_optional',
|
|
'parse_pair',
|
|
'parse_str',
|
|
'parse_type_bool',
|
|
'parse_type_int',
|
|
'parse_type_number',
|
|
'parse_type_size',
|
|
'parse_type_str',
|
|
'parse_value',
|
|
'parser_context_free',
|
|
'parser_context_new',
|
|
'parser_context_peek_token',
|
|
'parser_context_pop_token',
|
|
'parser_context_restore',
|
|
'parser_context_save',
|
|
'patch_reloc',
|
|
'phys_map_node_alloc',
|
|
'phys_map_node_reserve',
|
|
'phys_mem_alloc',
|
|
'phys_mem_set_alloc',
|
|
'phys_page_compact',
|
|
'phys_page_compact_all',
|
|
'phys_page_find',
|
|
'phys_page_set',
|
|
'phys_page_set_level',
|
|
'phys_section_add',
|
|
'phys_section_destroy',
|
|
'phys_sections_free',
|
|
'pickNaN',
|
|
'pickNaNMulAdd',
|
|
'pmccfiltr_write',
|
|
'pmccntr_read',
|
|
'pmccntr_write',
|
|
'pmccntr_write32',
|
|
'pmcntenclr_write',
|
|
'pmcntenset_write',
|
|
'pmcr_write',
|
|
'pmintenclr_write',
|
|
'pmintenset_write',
|
|
'pmovsr_write',
|
|
'pmreg_access',
|
|
'pmsav5_cp_reginfo',
|
|
'pmsav5_data_ap_read',
|
|
'pmsav5_data_ap_write',
|
|
'pmsav5_insn_ap_read',
|
|
'pmsav5_insn_ap_write',
|
|
'pmuserenr_write',
|
|
'pmxevtyper_write',
|
|
'ppc_tb_set_jmp_target',
|
|
'print_type_bool',
|
|
'print_type_int',
|
|
'print_type_number',
|
|
'print_type_size',
|
|
'print_type_str',
|
|
'probe_access',
|
|
'probe_access_flags',
|
|
'probe_read',
|
|
'probe_write',
|
|
'propagateFloat128NaN',
|
|
'propagateFloat32MulAddNaN',
|
|
'propagateFloat32NaN',
|
|
'propagateFloat64MulAddNaN',
|
|
'propagateFloat64NaN',
|
|
'propagateFloatx80NaN',
|
|
'property_get_alias',
|
|
'property_get_bool',
|
|
'property_get_str',
|
|
'property_get_uint16_ptr',
|
|
'property_get_uint32_ptr',
|
|
'property_get_uint64_ptr',
|
|
'property_get_uint8_ptr',
|
|
'property_release_alias',
|
|
'property_release_bool',
|
|
'property_release_str',
|
|
'property_resolve_alias',
|
|
'property_set_alias',
|
|
'property_set_bool',
|
|
'property_set_str',
|
|
'pstate_read',
|
|
'pstate_write',
|
|
'pxa250_initfn',
|
|
'pxa255_initfn',
|
|
'pxa260_initfn',
|
|
'pxa261_initfn',
|
|
'pxa262_initfn',
|
|
'pxa270a0_initfn',
|
|
'pxa270a1_initfn',
|
|
'pxa270b0_initfn',
|
|
'pxa270b1_initfn',
|
|
'pxa270c0_initfn',
|
|
'pxa270c5_initfn',
|
|
'qapi_dealloc_end_implicit_struct',
|
|
'qapi_dealloc_end_list',
|
|
'qapi_dealloc_end_struct',
|
|
'qapi_dealloc_get_visitor',
|
|
'qapi_dealloc_next_list',
|
|
'qapi_dealloc_pop',
|
|
'qapi_dealloc_push',
|
|
'qapi_dealloc_start_implicit_struct',
|
|
'qapi_dealloc_start_list',
|
|
'qapi_dealloc_start_struct',
|
|
'qapi_dealloc_start_union',
|
|
'qapi_dealloc_type_bool',
|
|
'qapi_dealloc_type_enum',
|
|
'qapi_dealloc_type_int',
|
|
'qapi_dealloc_type_number',
|
|
'qapi_dealloc_type_size',
|
|
'qapi_dealloc_type_str',
|
|
'qapi_dealloc_visitor_cleanup',
|
|
'qapi_dealloc_visitor_new',
|
|
'qapi_free_ErrorClassList',
|
|
'qapi_free_X86CPUFeatureWordInfo',
|
|
'qapi_free_X86CPUFeatureWordInfoList',
|
|
'qapi_free_X86CPURegister32List',
|
|
'qapi_free_boolList',
|
|
'qapi_free_int16List',
|
|
'qapi_free_int32List',
|
|
'qapi_free_int64List',
|
|
'qapi_free_int8List',
|
|
'qapi_free_intList',
|
|
'qapi_free_numberList',
|
|
'qapi_free_strList',
|
|
'qapi_free_uint16List',
|
|
'qapi_free_uint32List',
|
|
'qapi_free_uint64List',
|
|
'qapi_free_uint8List',
|
|
'qbool_destroy_obj',
|
|
'qbool_from_int',
|
|
'qbool_get_int',
|
|
'qbool_type',
|
|
'qbus_create',
|
|
'qbus_create_inplace',
|
|
'qbus_finalize',
|
|
'qbus_initfn',
|
|
'qbus_realize',
|
|
'qdev_create',
|
|
'qdev_get_type',
|
|
'qdev_register_types',
|
|
'qdev_set_parent_bus',
|
|
'qdev_try_create',
|
|
'qdict_add_key',
|
|
'qdict_array_split',
|
|
'qdict_clone_shallow',
|
|
'qdict_del',
|
|
'qdict_destroy_obj',
|
|
'qdict_entry_key',
|
|
'qdict_entry_value',
|
|
'qdict_extract_subqdict',
|
|
'qdict_find',
|
|
'qdict_first',
|
|
'qdict_flatten',
|
|
'qdict_flatten_qdict',
|
|
'qdict_flatten_qlist',
|
|
'qdict_get',
|
|
'qdict_get_bool',
|
|
'qdict_get_double',
|
|
'qdict_get_int',
|
|
'qdict_get_obj',
|
|
'qdict_get_qdict',
|
|
'qdict_get_qlist',
|
|
'qdict_get_str',
|
|
'qdict_get_try_bool',
|
|
'qdict_get_try_int',
|
|
'qdict_get_try_str',
|
|
'qdict_has_prefixed_entries',
|
|
'qdict_haskey',
|
|
'qdict_iter',
|
|
'qdict_join',
|
|
'qdict_new',
|
|
'qdict_next',
|
|
'qdict_next_entry',
|
|
'qdict_put_bool',
|
|
'qdict_put_int',
|
|
'qdict_put_null',
|
|
'qdict_put_obj',
|
|
'qdict_put_str',
|
|
'qdict_rename_keys',
|
|
'qdict_size',
|
|
'qdict_type',
|
|
'qemu_build_not_reached_always',
|
|
'qemu_clock_get_us',
|
|
'qemu_clock_ptr',
|
|
'qemu_clocks',
|
|
'qemu_fdatasync',
|
|
'qemu_get_cpu',
|
|
'qemu_get_guest_memory_mapping',
|
|
'qemu_get_guest_simple_memory_mapping',
|
|
'qemu_get_ram_block',
|
|
'qemu_host_page_mask',
|
|
'qemu_host_page_size',
|
|
'qemu_init_vcpu',
|
|
'qemu_ld_helpers',
|
|
'qemu_log_enabled',
|
|
'qemu_log_vprintf',
|
|
'qemu_loglevel_mask',
|
|
'qemu_map_ram_ptr',
|
|
'qemu_oom_check',
|
|
'qemu_parse_fd',
|
|
'qemu_ram_addr_from_host',
|
|
'qemu_ram_addr_from_host_nofail',
|
|
'qemu_ram_alloc',
|
|
'qemu_ram_alloc_from_ptr',
|
|
'qemu_ram_alloc_resizeable',
|
|
'qemu_ram_block_by_name',
|
|
'qemu_ram_block_from_host',
|
|
'qemu_ram_block_writeback',
|
|
'qemu_ram_foreach_block',
|
|
'qemu_ram_free',
|
|
'qemu_ram_get_idstr',
|
|
'qemu_ram_is_shared',
|
|
'qemu_ram_ptr_length',
|
|
'qemu_ram_remap',
|
|
'qemu_ram_resize',
|
|
'qemu_ram_setup_dump',
|
|
'qemu_ram_unset_idstr',
|
|
'qemu_ram_writeback',
|
|
'qemu_st_helpers',
|
|
'qemu_strnlen',
|
|
'qemu_strsep',
|
|
'qemu_tcg_configure',
|
|
'qemu_tcg_init_vcpu',
|
|
'qemu_try_memalign',
|
|
'qentry_destroy',
|
|
'qerror_human',
|
|
'qerror_report',
|
|
'qerror_report_err',
|
|
'qfloat_destroy_obj',
|
|
'qfloat_from_double',
|
|
'qfloat_get_double',
|
|
'qfloat_type',
|
|
'qint_destroy_obj',
|
|
'qint_from_int',
|
|
'qint_get_int',
|
|
'qint_type',
|
|
'qlist_append_bool',
|
|
'qlist_append_int',
|
|
'qlist_append_null',
|
|
'qlist_append_obj',
|
|
'qlist_append_str',
|
|
'qlist_copy',
|
|
'qlist_copy_elem',
|
|
'qlist_destroy_obj',
|
|
'qlist_empty',
|
|
'qlist_entry_obj',
|
|
'qlist_first',
|
|
'qlist_iter',
|
|
'qlist_new',
|
|
'qlist_next',
|
|
'qlist_peek',
|
|
'qlist_pop',
|
|
'qlist_size',
|
|
'qlist_size_iter',
|
|
'qlist_type',
|
|
'qlit_equal_qobject',
|
|
'qobject_from_qlit',
|
|
'qobject_get_try_str',
|
|
'qobject_input_end_implicit_struct',
|
|
'qobject_input_end_list',
|
|
'qobject_input_end_struct',
|
|
'qobject_input_get_next_type',
|
|
'qobject_input_get_object',
|
|
'qobject_input_get_visitor',
|
|
'qobject_input_next_list',
|
|
'qobject_input_optional',
|
|
'qobject_input_pop',
|
|
'qobject_input_push',
|
|
'qobject_input_start_implicit_struct',
|
|
'qobject_input_start_list',
|
|
'qobject_input_start_struct',
|
|
'qobject_input_type_bool',
|
|
'qobject_input_type_int',
|
|
'qobject_input_type_number',
|
|
'qobject_input_type_str',
|
|
'qobject_input_visitor_cleanup',
|
|
'qobject_input_visitor_new',
|
|
'qobject_input_visitor_new_strict',
|
|
'qobject_output_add_obj',
|
|
'qobject_output_end_list',
|
|
'qobject_output_end_struct',
|
|
'qobject_output_first',
|
|
'qobject_output_get_qobject',
|
|
'qobject_output_get_visitor',
|
|
'qobject_output_last',
|
|
'qobject_output_next_list',
|
|
'qobject_output_pop',
|
|
'qobject_output_push_obj',
|
|
'qobject_output_start_list',
|
|
'qobject_output_start_struct',
|
|
'qobject_output_type_bool',
|
|
'qobject_output_type_int',
|
|
'qobject_output_type_number',
|
|
'qobject_output_type_str',
|
|
'qobject_output_visitor_cleanup',
|
|
'qobject_output_visitor_new',
|
|
'qobject_decref',
|
|
'qobject_type',
|
|
'qstring_append',
|
|
'qstring_append_chr',
|
|
'qstring_append_int',
|
|
'qstring_destroy_obj',
|
|
'qstring_from_escaped_str',
|
|
'qstring_from_str',
|
|
'qstring_from_substr',
|
|
'qstring_get_length',
|
|
'qstring_get_str',
|
|
'qstring_get_try_str',
|
|
'qstring_new',
|
|
'qstring_type',
|
|
'ram_block_add',
|
|
'ram_size',
|
|
'range_compare',
|
|
'range_covers_byte',
|
|
'range_get_last',
|
|
'range_merge',
|
|
'ranges_can_merge',
|
|
'raw_read',
|
|
'raw_write',
|
|
'rcon',
|
|
'read_raw_cp_reg',
|
|
'recip_estimate',
|
|
'recip_sqrt_estimate',
|
|
'register_cp_regs_for_features',
|
|
'register_multipage',
|
|
'register_subpage',
|
|
'register_tm_clones',
|
|
'register_types_object',
|
|
'regnames',
|
|
'render_memory_region',
|
|
'reset_all_temps',
|
|
'reset_temp',
|
|
'restore_state_to_opc',
|
|
'resume_all_vcpus',
|
|
'rol32',
|
|
'rol64',
|
|
'ror32',
|
|
'ror64',
|
|
'roundAndPackFloat128',
|
|
'roundAndPackFloat16',
|
|
'roundAndPackFloat32',
|
|
'roundAndPackFloat64',
|
|
'roundAndPackFloatx80',
|
|
'roundAndPackInt32',
|
|
'roundAndPackInt64',
|
|
'roundAndPackUint64',
|
|
'round_to_inf',
|
|
'run_on_cpu',
|
|
's0',
|
|
's1',
|
|
'sa1100_initfn',
|
|
'sa1110_initfn',
|
|
'save_globals',
|
|
'scr_write',
|
|
'sctlr_write',
|
|
'set_bit',
|
|
'set_bits',
|
|
'set_default_nan_mode',
|
|
'set_feature',
|
|
'set_float_detect_tininess',
|
|
'set_float_exception_flags',
|
|
'set_float_rounding_mode',
|
|
'set_flush_inputs_to_zero',
|
|
'set_flush_to_zero',
|
|
'set_preferred_target_page_bits',
|
|
'set_swi_errno',
|
|
'sextract32',
|
|
'sextract64',
|
|
'shift128ExtraRightJamming',
|
|
'shift128Right',
|
|
'shift128RightJamming',
|
|
'shift32RightJamming',
|
|
'shift64ExtraRightJamming',
|
|
'shift64RightJamming',
|
|
'shifter_out_im',
|
|
'shortShift128Left',
|
|
'shortShift192Left',
|
|
'simd_desc',
|
|
'simple_mpu_ap_bits',
|
|
'size_code_gen_buffer',
|
|
'softmmu_lock_user',
|
|
'softmmu_lock_user_string',
|
|
'softmmu_tget32',
|
|
'softmmu_tget8',
|
|
'softmmu_tput32',
|
|
'softmmu_unlock_user',
|
|
'sort_constraints',
|
|
'sp_el0_access',
|
|
'spsel_read',
|
|
'spsel_write',
|
|
'start_list',
|
|
'stb_p',
|
|
'stb_phys',
|
|
'stb_phys_cached',
|
|
'stl_be_p',
|
|
'stl_be_phys',
|
|
'stl_be_phys_cached',
|
|
'stl_he_p',
|
|
'stl_le_p',
|
|
'stl_le_phys',
|
|
'stl_le_phys_cached',
|
|
'stl_phys',
|
|
'stl_phys_cached',
|
|
'stl_phys_internal',
|
|
'stl_phys_notdirty',
|
|
'stl_phys_notdirty_cached',
|
|
'store_cpu_offset',
|
|
'store_reg',
|
|
'store_reg_bx',
|
|
'store_reg_from_load',
|
|
'stq_be_p',
|
|
'stq_be_phys',
|
|
'stq_be_phys_cached',
|
|
'stq_he_p',
|
|
'stq_le_p',
|
|
'stq_le_phys',
|
|
'stq_le_phys_cached',
|
|
'stq_phys',
|
|
'stq_phys_cached',
|
|
'string_input_get_visitor',
|
|
'string_input_visitor_cleanup',
|
|
'string_input_visitor_new',
|
|
'stristart',
|
|
'strongarm_cp_reginfo',
|
|
'strpadcpy',
|
|
'strstart',
|
|
'stw_be_p',
|
|
'stw_be_phys',
|
|
'stw_be_phys_cached',
|
|
'stw_he_p',
|
|
'stw_le_p',
|
|
'stw_le_phys',
|
|
'stw_le_phys_cached',
|
|
'stw_phys',
|
|
'stw_phys_cached',
|
|
'stw_phys_internal',
|
|
'sub128',
|
|
'sub16_sat',
|
|
'sub16_usat',
|
|
'sub192',
|
|
'sub8_sat',
|
|
'sub8_usat',
|
|
'subFloat128Sigs',
|
|
'subFloat32Sigs',
|
|
'subFloat64Sigs',
|
|
'subFloatx80Sigs',
|
|
'subpage_accepts',
|
|
'subpage_init',
|
|
'subpage_ops',
|
|
'subpage_read',
|
|
'subpage_register',
|
|
'subpage_write',
|
|
'suffix_mul',
|
|
'swap_commutative',
|
|
'swap_commutative2',
|
|
'switch_mode',
|
|
'syn_aa32_bkpt',
|
|
'syn_aa32_hvc',
|
|
'syn_aa32_smc',
|
|
'syn_aa32_svc',
|
|
'syn_breakpoint',
|
|
'syn_cp14_rrt_trap',
|
|
'syn_cp14_rt_trap',
|
|
'syn_cp15_rrt_trap',
|
|
'syn_cp15_rt_trap',
|
|
'syn_data_abort',
|
|
'syn_fp_access_trap',
|
|
'syn_insn_abort',
|
|
'syn_swstep',
|
|
'syn_uncategorized',
|
|
'syn_watchpoint',
|
|
'sync_globals',
|
|
'syscall_err',
|
|
'system_bus_class_init',
|
|
'system_bus_info',
|
|
't2ee_cp_reginfo',
|
|
'table_logic_cc',
|
|
'target_el_table',
|
|
'target_parse_constraint',
|
|
'target_words_bigendian',
|
|
'tb_alloc',
|
|
'tb_alloc_page',
|
|
'tb_check_watchpoint',
|
|
'tb_cleanup',
|
|
'tb_find_fast',
|
|
'tb_find_pc',
|
|
'tb_find_slow',
|
|
'tb_flush',
|
|
'tb_flush_jmp_cache',
|
|
'tb_free',
|
|
'tb_gen_code',
|
|
'tb_hash_remove',
|
|
'tb_htable_lookup',
|
|
'tb_invalidate_phys_addr',
|
|
'tb_invalidate_phys_page_fast',
|
|
'tb_invalidate_phys_page_range',
|
|
'tb_invalidate_phys_range',
|
|
'tb_jmp_cache_hash_func',
|
|
'tb_jmp_cache_hash_page',
|
|
'tb_jmp_remove',
|
|
'tb_link_page',
|
|
'tb_page_remove',
|
|
'tb_phys_hash_func',
|
|
'tb_phys_invalidate',
|
|
'tb_reset_jump',
|
|
'tb_set_jmp_target',
|
|
'tcg_accel_class_init',
|
|
'tcg_accel_type',
|
|
'tcg_add_param_i32',
|
|
'tcg_add_param_i64',
|
|
'tcg_add_target_add_op_defs',
|
|
'tcg_allowed',
|
|
'tcg_assert_listed_vecop',
|
|
'tcg_can_emit_vec_op',
|
|
'tcg_can_emit_vecop_list',
|
|
'tcg_canonicalize_memop',
|
|
'tcg_commit',
|
|
'tcg_cond_to_jcc',
|
|
'tcg_const_i32',
|
|
'tcg_const_i64',
|
|
'tcg_const_local_i32',
|
|
'tcg_const_local_i64',
|
|
'tcg_const_ones_vec',
|
|
'tcg_const_ones_vec_matching',
|
|
'tcg_const_zeros_vec',
|
|
'tcg_const_zeros_vec_matching',
|
|
'tcg_constant_folding',
|
|
'tcg_constant_internal',
|
|
'tcg_constant_vec',
|
|
'tcg_constant_vec_matching',
|
|
'tcg_context_init',
|
|
'tcg_cpu_exec',
|
|
'tcg_current_code_size',
|
|
'tcg_dump_info',
|
|
'tcg_dump_ops',
|
|
'tcg_emit_op',
|
|
'tcg_enabled',
|
|
'tcg_exec_all',
|
|
'tcg_exec_init',
|
|
'tcg_expand_vec_op',
|
|
'tcg_find_helper',
|
|
'tcg_flush_softmmu_tlb',
|
|
'tcg_func_start',
|
|
'tcg_gen_abs_i32',
|
|
'tcg_gen_abs_i64',
|
|
'tcg_gen_abs_vec',
|
|
'tcg_gen_add2_i32',
|
|
'tcg_gen_add2_i64',
|
|
'tcg_gen_add_i32',
|
|
'tcg_gen_add_i64',
|
|
'tcg_gen_add_vec',
|
|
'tcg_gen_addi_i32',
|
|
'tcg_gen_addi_i64',
|
|
'tcg_gen_and_i32',
|
|
'tcg_gen_and_i64',
|
|
'tcg_gen_and_vec',
|
|
'tcg_gen_andc_i32',
|
|
'tcg_gen_andc_i64',
|
|
'tcg_gen_andc_vec',
|
|
'tcg_gen_andi_i32',
|
|
'tcg_gen_andi_i64',
|
|
'tcg_gen_atomic_add_fetch_i32',
|
|
'tcg_gen_atomic_add_fetch_i64',
|
|
'tcg_gen_atomic_and_fetch_i32',
|
|
'tcg_gen_atomic_and_fetch_i64',
|
|
'tcg_gen_atomic_cmpxchg_i32',
|
|
'tcg_gen_atomic_cmpxchg_i64',
|
|
'tcg_gen_atomic_fetch_add_i32',
|
|
'tcg_gen_atomic_fetch_add_i64',
|
|
'tcg_gen_atomic_fetch_and_i32',
|
|
'tcg_gen_atomic_fetch_and_i64',
|
|
'tcg_gen_atomic_fetch_or_i32',
|
|
'tcg_gen_atomic_fetch_or_i64',
|
|
'tcg_gen_atomic_fetch_smax_i32',
|
|
'tcg_gen_atomic_fetch_smax_i64',
|
|
'tcg_gen_atomic_fetch_smin_i32',
|
|
'tcg_gen_atomic_fetch_smin_i64',
|
|
'tcg_gen_atomic_fetch_umax_i32',
|
|
'tcg_gen_atomic_fetch_umax_i64',
|
|
'tcg_gen_atomic_fetch_umin_i32',
|
|
'tcg_gen_atomic_fetch_umin_i64',
|
|
'tcg_gen_atomic_fetch_xor_i32',
|
|
'tcg_gen_atomic_fetch_xor_i64',
|
|
'tcg_gen_atomic_or_fetch_i32',
|
|
'tcg_gen_atomic_or_fetch_i64',
|
|
'tcg_gen_atomic_smax_fetch_i32',
|
|
'tcg_gen_atomic_smax_fetch_i64',
|
|
'tcg_gen_atomic_smin_fetch_i32',
|
|
'tcg_gen_atomic_smin_fetch_i64',
|
|
'tcg_gen_atomic_umax_fetch_i32',
|
|
'tcg_gen_atomic_umax_fetch_i64',
|
|
'tcg_gen_atomic_umin_fetch_i32',
|
|
'tcg_gen_atomic_umin_fetch_i64',
|
|
'tcg_gen_atomic_xchg_i32',
|
|
'tcg_gen_atomic_xchg_i64',
|
|
'tcg_gen_atomic_xor_fetch_i32',
|
|
'tcg_gen_atomic_xor_fetch_i64',
|
|
'tcg_gen_bitsel_vec',
|
|
'tcg_gen_br',
|
|
'tcg_gen_brcond_i32',
|
|
'tcg_gen_brcond_i64',
|
|
'tcg_gen_brcondi_i32',
|
|
'tcg_gen_brcondi_i64',
|
|
'tcg_gen_bswap16_i32',
|
|
'tcg_gen_bswap16_i64',
|
|
'tcg_gen_bswap32_i32',
|
|
'tcg_gen_bswap32_i64',
|
|
'tcg_gen_bswap64_i64',
|
|
'tcg_gen_callN',
|
|
'tcg_gen_clrsb_i32',
|
|
'tcg_gen_clrsb_i64',
|
|
'tcg_gen_clz_i32',
|
|
'tcg_gen_clz_i64',
|
|
'tcg_gen_clzi_i32',
|
|
'tcg_gen_clzi_i64',
|
|
'tcg_gen_cmp_vec',
|
|
'tcg_gen_cmpsel_vec',
|
|
'tcg_gen_ctpop_i32',
|
|
'tcg_gen_ctpop_i64',
|
|
'tcg_gen_ctz_i32',
|
|
'tcg_gen_ctz_i64',
|
|
'tcg_gen_ctzi_i32',
|
|
'tcg_gen_ctzi_i64',
|
|
'tcg_gen_code',
|
|
'tcg_gen_concat_i32_i64',
|
|
'tcg_gen_deposit_i32',
|
|
'tcg_gen_deposit_i64',
|
|
'tcg_gen_deposit_z_i32',
|
|
'tcg_gen_deposit_z_i64',
|
|
'tcg_gen_discard_i64',
|
|
'tcg_gen_div_i32',
|
|
'tcg_gen_div_i64',
|
|
'tcg_gen_divu_i32',
|
|
'tcg_gen_divu_i64',
|
|
'tcg_gen_dupi_vec',
|
|
'tcg_gen_dupm_vec',
|
|
'tcg_gen_dup_i32_vec',
|
|
'tcg_gen_dup_i64_vec',
|
|
'tcg_gen_dup_mem_vec',
|
|
'tcg_gen_eqv_i32',
|
|
'tcg_gen_eqv_i64',
|
|
'tcg_gen_eqv_vec',
|
|
'tcg_gen_exit_tb',
|
|
'tcg_gen_ext16s_i32',
|
|
'tcg_gen_ext16s_i64',
|
|
'tcg_gen_ext16u_i32',
|
|
'tcg_gen_ext16u_i64',
|
|
'tcg_gen_ext32s_i64',
|
|
'tcg_gen_ext32u_i64',
|
|
'tcg_gen_ext8s_i32',
|
|
'tcg_gen_ext8s_i64',
|
|
'tcg_gen_ext8u_i32',
|
|
'tcg_gen_ext8u_i64',
|
|
'tcg_gen_ext_i32_i64',
|
|
'tcg_gen_extr32_i64',
|
|
'tcg_gen_extr_i64_i32',
|
|
'tcg_gen_extract_i32',
|
|
'tcg_gen_extract_i64',
|
|
'tcg_gen_extract2_i32',
|
|
'tcg_gen_extract2_i64',
|
|
'tcg_gen_extrh_i64_i32',
|
|
'tcg_gen_extrl_i64_i32',
|
|
'tcg_gen_extu_i32_i64',
|
|
'tcg_gen_goto_tb',
|
|
'tcg_gen_gvec_2',
|
|
'tcg_gen_gvec_2i',
|
|
'tcg_gen_gvec_2i_ool',
|
|
'tcg_gen_gvec_2s',
|
|
'tcg_gen_gvec_2_ool',
|
|
'tcg_gen_gvec_2_ptr',
|
|
'tcg_gen_gvec_3',
|
|
'tcg_gen_gvec_3i',
|
|
'tcg_gen_gvec_3_ool',
|
|
'tcg_gen_gvec_3_ptr',
|
|
'tcg_gen_gvec_4',
|
|
'tcg_gen_gvec_4_ool',
|
|
'tcg_gen_gvec_4_ptr',
|
|
'tcg_gen_gvec_5_ool',
|
|
'tcg_gen_gvec_5_ptr',
|
|
'tcg_gen_gvec_abs',
|
|
'tcg_gen_gvec_add',
|
|
'tcg_gen_gvec_addi',
|
|
'tcg_gen_gvec_adds',
|
|
'tcg_gen_gvec_adds8',
|
|
'tcg_gen_gvec_adds16',
|
|
'tcg_gen_gvec_adds32',
|
|
'tcg_gen_gvec_adds64',
|
|
'tcg_gen_gvec_and',
|
|
'tcg_gen_gvec_andc',
|
|
'tcg_gen_gvec_andi',
|
|
'tcg_gen_gvec_ands',
|
|
'tcg_gen_gvec_bitsel',
|
|
'tcg_gen_gvec_cmp',
|
|
'tcg_gen_gvec_dup_i32',
|
|
'tcg_gen_gvec_dup_i64',
|
|
'tcg_gen_gvec_dup_imm',
|
|
'tcg_gen_gvec_dup_mem',
|
|
'tcg_gen_gvec_eqv',
|
|
'tcg_gen_gvec_mov',
|
|
'tcg_gen_gvec_mul',
|
|
'tcg_gen_gvec_muli',
|
|
'tcg_gen_gvec_muls',
|
|
'tcg_gen_gvec_muls8',
|
|
'tcg_gen_gvec_muls16',
|
|
'tcg_gen_gvec_muls32',
|
|
'tcg_gen_gvec_muls64',
|
|
'tcg_gen_gvec_nand',
|
|
'tcg_gen_gvec_neg',
|
|
'tcg_gen_gvec_nor',
|
|
'tcg_gen_gvec_not',
|
|
'tcg_gen_gvec_or',
|
|
'tcg_gen_gvec_orc',
|
|
'tcg_gen_gvec_ori',
|
|
'tcg_gen_gvec_ors',
|
|
'tcg_gen_gvec_rotli',
|
|
'tcg_gen_gvec_rotls',
|
|
'tcg_gen_gvec_rotri',
|
|
'tcg_gen_gvec_rotlv',
|
|
'tcg_gen_gvec_rotrv',
|
|
'tcg_gen_gvec_sar8v',
|
|
'tcg_gen_gvec_sar16v',
|
|
'tcg_gen_gvec_sar32v',
|
|
'tcg_gen_gvec_sar64v',
|
|
'tcg_gen_gvec_sari',
|
|
'tcg_gen_gvec_sars',
|
|
'tcg_gen_gvec_sarv',
|
|
'tcg_gen_gvec_shl8v',
|
|
'tcg_gen_gvec_shl16v',
|
|
'tcg_gen_gvec_shl32v',
|
|
'tcg_gen_gvec_shl64v',
|
|
'tcg_gen_gvec_shli',
|
|
'tcg_gen_gvec_shls',
|
|
'tcg_gen_gvec_shlv',
|
|
'tcg_gen_gvec_shri',
|
|
'tcg_gen_gvec_shrs',
|
|
'tcg_gen_gvec_shrv',
|
|
'tcg_gen_gvec_shr8v',
|
|
'tcg_gen_gvec_shr16v',
|
|
'tcg_gen_gvec_shr32v',
|
|
'tcg_gen_gvec_shr64v',
|
|
'tcg_gen_gvec_smax',
|
|
'tcg_gen_gvec_smin',
|
|
'tcg_gen_gvec_ssadd',
|
|
'tcg_gen_gvec_sssub',
|
|
'tcg_gen_gvec_sub',
|
|
'tcg_gen_gvec_subs',
|
|
'tcg_gen_gvec_subs8',
|
|
'tcg_gen_gvec_subs16',
|
|
'tcg_gen_gvec_subs32',
|
|
'tcg_gen_gvec_subs64',
|
|
'tcg_gen_gvec_umax',
|
|
'tcg_gen_gvec_umin',
|
|
'tcg_gen_gvec_usadd',
|
|
'tcg_gen_gvec_ussub',
|
|
'tcg_gen_gvec_xor',
|
|
'tcg_gen_gvec_xori',
|
|
'tcg_gen_gvec_xors',
|
|
'tcg_gen_insn_start',
|
|
'tcg_gen_ld16s_i64',
|
|
'tcg_gen_ld16u_i64',
|
|
'tcg_gen_ld32s_i64',
|
|
'tcg_gen_ld32u_i64',
|
|
'tcg_gen_ld8s_i64',
|
|
'tcg_gen_ld8u_i64',
|
|
'tcg_gen_ld_i32',
|
|
'tcg_gen_ld_i64',
|
|
'tcg_gen_ld_vec',
|
|
'tcg_gen_ldst_op_i32',
|
|
'tcg_gen_ldst_op_i64',
|
|
'tcg_gen_lookup_and_goto_ptr',
|
|
'tcg_gen_mb',
|
|
'tcg_gen_mov_i32',
|
|
'tcg_gen_mov_i64',
|
|
'tcg_gen_mov_vec',
|
|
'tcg_gen_movcond_i32',
|
|
'tcg_gen_movcond_i64',
|
|
'tcg_gen_movi_i32',
|
|
'tcg_gen_movi_i64',
|
|
'tcg_gen_mul_i32',
|
|
'tcg_gen_mul_i64',
|
|
'tcg_gen_mul_vec',
|
|
'tcg_gen_muli_i32',
|
|
'tcg_gen_muli_i64',
|
|
'tcg_gen_muls2_i32',
|
|
'tcg_gen_muls2_i64',
|
|
'tcg_gen_mulsu2_i32',
|
|
'tcg_gen_mulsu2_i64',
|
|
'tcg_gen_mulu2_i32',
|
|
'tcg_gen_mulu2_i64',
|
|
'tcg_gen_nand_i32',
|
|
'tcg_gen_nand_i64',
|
|
'tcg_gen_nand_vec',
|
|
'tcg_gen_neg_i32',
|
|
'tcg_gen_neg_i64',
|
|
'tcg_gen_neg_vec',
|
|
'tcg_gen_nor_i32',
|
|
'tcg_gen_nor_i64',
|
|
'tcg_gen_nor_vec',
|
|
'tcg_gen_not_i32',
|
|
'tcg_gen_not_i64',
|
|
'tcg_gen_not_vec',
|
|
'tcg_gen_op1',
|
|
'tcg_gen_op1i',
|
|
'tcg_gen_op2',
|
|
'tcg_gen_op2_i32',
|
|
'tcg_gen_op2_i64',
|
|
'tcg_gen_op2i_i32',
|
|
'tcg_gen_op2i_i64',
|
|
'tcg_gen_op3',
|
|
'tcg_gen_op3_i32',
|
|
'tcg_gen_op3_i64',
|
|
'tcg_gen_op4',
|
|
'tcg_gen_op4_i32',
|
|
'tcg_gen_op4i_i32',
|
|
'tcg_gen_op4ii_i32',
|
|
'tcg_gen_op4ii_i64',
|
|
'tcg_gen_op5',
|
|
'tcg_gen_op5ii_i32',
|
|
'tcg_gen_op6',
|
|
'tcg_gen_op6_i32',
|
|
'tcg_gen_op6i_i32',
|
|
'tcg_gen_op6i_i64',
|
|
'tcg_gen_or_i32',
|
|
'tcg_gen_or_i64',
|
|
'tcg_gen_or_vec',
|
|
'tcg_gen_orc_i32',
|
|
'tcg_gen_orc_i64',
|
|
'tcg_gen_orc_vec',
|
|
'tcg_gen_ori_i32',
|
|
'tcg_gen_ori_i64',
|
|
'tcg_gen_qemu_ld_i32',
|
|
'tcg_gen_qemu_ld_i64',
|
|
'tcg_gen_qemu_st_i32',
|
|
'tcg_gen_qemu_st_i64',
|
|
'tcg_gen_rem_i32',
|
|
'tcg_gen_rem_i64',
|
|
'tcg_gen_remu_i32',
|
|
'tcg_gen_remu_i64',
|
|
'tcg_gen_rotl_i32',
|
|
'tcg_gen_rotl_i64',
|
|
'tcg_gen_rotli_i32',
|
|
'tcg_gen_rotli_i64',
|
|
'tcg_gen_rotli_vec',
|
|
'tcg_gen_rotls_vec',
|
|
'tcg_gen_rotlv_vec',
|
|
'tcg_gen_rotri_vec',
|
|
'tcg_gen_rotrv_vec',
|
|
'tcg_gen_rotr_i32',
|
|
'tcg_gen_rotr_i64',
|
|
'tcg_gen_rotri_i32',
|
|
'tcg_gen_rotri_i64',
|
|
'tcg_gen_sar_i32',
|
|
'tcg_gen_sar_i64',
|
|
'tcg_gen_sari_i32',
|
|
'tcg_gen_sari_i64',
|
|
'tcg_gen_sari_vec',
|
|
'tcg_gen_sars_vec',
|
|
'tcg_gen_sarv_vec',
|
|
'tcg_gen_setcond_i32',
|
|
'tcg_gen_setcond_i64',
|
|
'tcg_gen_setcondi_i32',
|
|
'tcg_gen_setcondi_i64',
|
|
'tcg_gen_sextract_i32',
|
|
'tcg_gen_sextract_i64',
|
|
'tcg_gen_shifti_i64',
|
|
'tcg_gen_shl_i32',
|
|
'tcg_gen_shl_i64',
|
|
'tcg_gen_shli_i32',
|
|
'tcg_gen_shli_i64',
|
|
'tcg_gen_shli_vec',
|
|
'tcg_gen_shls_vec',
|
|
'tcg_gen_shlv_vec',
|
|
'tcg_gen_shr_i32',
|
|
'tcg_gen_shr_i64',
|
|
'tcg_gen_shri_i32',
|
|
'tcg_gen_shri_i64',
|
|
'tcg_gen_shri_vec',
|
|
'tcg_gen_shrs_vec',
|
|
'tcg_gen_shrv_vec',
|
|
'tcg_gen_smax_i32',
|
|
'tcg_gen_smax_i64',
|
|
'tcg_gen_smax_vec',
|
|
'tcg_gen_smin_i32',
|
|
'tcg_gen_smin_i64',
|
|
'tcg_gen_smin_vec',
|
|
'tcg_gen_ssadd_vec',
|
|
'tcg_gen_sssub_vec',
|
|
'tcg_gen_st_i32',
|
|
'tcg_gen_st_i64',
|
|
'tcg_gen_st_vec',
|
|
'tcg_gen_stl_vec',
|
|
'tcg_gen_sub2_i32',
|
|
'tcg_gen_sub2_i64',
|
|
'tcg_gen_sub_i32',
|
|
'tcg_gen_sub_i64',
|
|
'tcg_gen_sub_vec',
|
|
'tcg_gen_subfi_i32',
|
|
'tcg_gen_subfi_i64',
|
|
'tcg_gen_subi_i32',
|
|
'tcg_gen_subi_i64',
|
|
'tcg_gen_umax_i32',
|
|
'tcg_gen_umax_i64',
|
|
'tcg_gen_umax_vec',
|
|
'tcg_gen_umin_i32',
|
|
'tcg_gen_umin_i64',
|
|
'tcg_gen_umin_vec',
|
|
'tcg_gen_usadd_vec',
|
|
'tcg_gen_ussub_vec',
|
|
'tcg_gen_vec_add8_i64',
|
|
'tcg_gen_vec_add16_i64',
|
|
'tcg_gen_vec_add32_i64',
|
|
'tcg_gen_vec_neg8_i64',
|
|
'tcg_gen_vec_neg16_i64',
|
|
'tcg_gen_vec_neg32_i64',
|
|
'tcg_gen_vec_rotl8i_i64',
|
|
'tcg_gen_vec_rotl16i_i64',
|
|
'tcg_gen_vec_sar8i_i64',
|
|
'tcg_gen_vec_sar16i_i64',
|
|
'tcg_gen_vec_shl8i_i64',
|
|
'tcg_gen_vec_shl16i_i64',
|
|
'tcg_gen_vec_shr8i_i64',
|
|
'tcg_gen_vec_shr16i_i64',
|
|
'tcg_gen_vec_sub8_i64',
|
|
'tcg_gen_vec_sub16_i64',
|
|
'tcg_gen_vec_sub32_i64',
|
|
'tcg_gen_xor_i32',
|
|
'tcg_gen_xor_i64',
|
|
'tcg_gen_xor_vec',
|
|
'tcg_gen_xori_i32',
|
|
'tcg_gen_xori_i64',
|
|
'tcg_get_arg_str_i32',
|
|
'tcg_get_arg_str_i64',
|
|
'tcg_get_arg_str_idx',
|
|
'tcg_global_mem_new_i32',
|
|
'tcg_global_mem_new_i64',
|
|
'tcg_global_mem_new_internal',
|
|
'tcg_global_reg_new_i32',
|
|
'tcg_global_reg_new_i64',
|
|
'tcg_global_reg_new_internal',
|
|
'tcg_handle_interrupt',
|
|
'tcg_init',
|
|
'tcg_invert_cond',
|
|
'tcg_la_bb_end',
|
|
'tcg_la_br_end',
|
|
'tcg_la_func_end',
|
|
'tcg_liveness_analysis',
|
|
'tcg_malloc',
|
|
'tcg_malloc_internal',
|
|
'tcg_op_defs_org',
|
|
'tcg_op_insert_after',
|
|
'tcg_op_insert_before',
|
|
'tcg_op_remove',
|
|
'tcg_op_supported',
|
|
'tcg_opt_gen_mov',
|
|
'tcg_opt_gen_movi',
|
|
'tcg_optimize',
|
|
'tcg_out16',
|
|
'tcg_out32',
|
|
'tcg_out64',
|
|
'tcg_out8',
|
|
'tcg_out_addi',
|
|
'tcg_out_branch',
|
|
'tcg_out_brcond32',
|
|
'tcg_out_brcond64',
|
|
'tcg_out_bswap32',
|
|
'tcg_out_bswap64',
|
|
'tcg_out_call',
|
|
'tcg_out_cmp',
|
|
'tcg_out_ext16s',
|
|
'tcg_out_ext16u',
|
|
'tcg_out_ext32s',
|
|
'tcg_out_ext32u',
|
|
'tcg_out_ext8s',
|
|
'tcg_out_ext8u',
|
|
'tcg_out_jmp',
|
|
'tcg_out_jxx',
|
|
'tcg_out_label',
|
|
'tcg_out_ld',
|
|
'tcg_out_modrm',
|
|
'tcg_out_modrm_offset',
|
|
'tcg_out_modrm_sib_offset',
|
|
'tcg_out_mov',
|
|
'tcg_out_movcond32',
|
|
'tcg_out_movcond64',
|
|
'tcg_out_movi',
|
|
'tcg_out_op',
|
|
'tcg_out_pop',
|
|
'tcg_out_push',
|
|
'tcg_out_qemu_ld',
|
|
'tcg_out_qemu_ld_direct',
|
|
'tcg_out_qemu_ld_slow_path',
|
|
'tcg_out_qemu_st',
|
|
'tcg_out_qemu_st_direct',
|
|
'tcg_out_qemu_st_slow_path',
|
|
'tcg_out_reloc',
|
|
'tcg_out_rolw_8',
|
|
'tcg_out_setcond32',
|
|
'tcg_out_setcond64',
|
|
'tcg_out_shifti',
|
|
'tcg_out_st',
|
|
'tcg_out_tb_finalize',
|
|
'tcg_out_tb_init',
|
|
'tcg_out_tlb_load',
|
|
'tcg_out_vex_modrm',
|
|
'tcg_patch32',
|
|
'tcg_patch8',
|
|
'tcg_pcrel_diff',
|
|
'tcg_pool_reset',
|
|
'tcg_prologue_init',
|
|
'tcg_ptr_byte_diff',
|
|
'tcg_reg_alloc',
|
|
'tcg_reg_alloc_bb_end',
|
|
'tcg_reg_alloc_call',
|
|
'tcg_reg_alloc_mov',
|
|
'tcg_reg_alloc_movi',
|
|
'tcg_reg_alloc_op',
|
|
'tcg_reg_alloc_start',
|
|
'tcg_reg_free',
|
|
'tcg_reg_sync',
|
|
'tcg_set_frame',
|
|
'tcg_set_nop',
|
|
'tcg_swap_cond',
|
|
'tcg_target_call_iarg_regs',
|
|
'tcg_target_call_oarg_regs',
|
|
'tcg_target_callee_save_regs',
|
|
'tcg_target_const_match',
|
|
'tcg_target_deposit_valid',
|
|
'tcg_target_init',
|
|
'tcg_target_qemu_prologue',
|
|
'tcg_target_reg_alloc_order',
|
|
'tcg_tb_alloc',
|
|
'tcg_temp_alloc',
|
|
'tcg_temp_free_internal',
|
|
'tcg_temp_local_new_i32',
|
|
'tcg_temp_local_new_i64',
|
|
'tcg_temp_new_i32',
|
|
'tcg_temp_new_i64',
|
|
'tcg_temp_new_internal',
|
|
'tcg_temp_new_vec',
|
|
'tcg_temp_new_vec_matching',
|
|
'tdb_hash',
|
|
'teecr_write',
|
|
'teehbr_access',
|
|
'temp_allocate_frame',
|
|
'temp_dead',
|
|
'temp_save',
|
|
'temp_sync',
|
|
'temps_are_copies',
|
|
'tgen_arithi',
|
|
'tgen_arithr',
|
|
'thumb2_logic_op',
|
|
'ti925t_initfn',
|
|
'tlb_add_large_page',
|
|
'tlb_init',
|
|
'tlb_flush',
|
|
'tlb_flush_by_mmuidx',
|
|
'tlb_flush_entry',
|
|
'tlb_flush_page',
|
|
'tlb_flush_page_by_mmuidx',
|
|
'tlb_is_dirty_ram',
|
|
'tlb_reset_dirty',
|
|
'tlb_reset_dirty_range',
|
|
'tlb_set_dirty',
|
|
'tlb_set_page',
|
|
'tlb_set_page_with_attrs',
|
|
'tlb_vaddr_to_host',
|
|
'tlbi_aa64_asid_is_write',
|
|
'tlbi_aa64_asid_write',
|
|
'tlbi_aa64_va_is_write',
|
|
'tlbi_aa64_va_write',
|
|
'tlbi_aa64_vaa_is_write',
|
|
'tlbi_aa64_vaa_write',
|
|
'tlbiall_is_write',
|
|
'tlbiall_write',
|
|
'tlbiasid_is_write',
|
|
'tlbiasid_write',
|
|
'tlbimva_is_write',
|
|
'tlbimva_write',
|
|
'tlbimvaa_is_write',
|
|
'tlbimvaa_write',
|
|
'to_qiv',
|
|
'to_qov',
|
|
'token_get_type',
|
|
'token_get_value',
|
|
'token_is_escape',
|
|
'token_is_keyword',
|
|
'token_is_operator',
|
|
'tokens_append_from_iter',
|
|
'tosa_init',
|
|
'tosa_machine_init_register_types',
|
|
'translator_loop',
|
|
'translator_loop_temp_check',
|
|
'tswap32',
|
|
'tswap64',
|
|
'type_class_get_size',
|
|
'type_get_by_name',
|
|
'type_get_parent',
|
|
'type_has_parent',
|
|
'type_initialize',
|
|
'type_initialize_interface',
|
|
'type_is_ancestor',
|
|
'type_new',
|
|
'type_object_get_size',
|
|
'type_register_internal',
|
|
'type_table_add',
|
|
'type_table_get',
|
|
'type_table_lookup',
|
|
'uint8_to_float16',
|
|
'uint16_to_bfloat16',
|
|
'uint16_to_bfloat16_scalbn',
|
|
'uint16_to_float16',
|
|
'uint16_to_float16_scalbn',
|
|
'uint16_to_float32',
|
|
'uint16_to_float32',
|
|
'uint16_to_float32_scalbn',
|
|
'uint16_to_float64',
|
|
'uint16_to_float64_scalbn',
|
|
'uint32_to_bfloat16',
|
|
'uint32_to_bfloat16_scalbn',
|
|
'uint32_to_float16',
|
|
'uint32_to_float16_scalbn',
|
|
'uint32_to_float32',
|
|
'uint32_to_float32_scalbn',
|
|
'uint32_to_float64',
|
|
'uint32_to_float64_scalbn',
|
|
'uint64_to_float128',
|
|
'uint64_to_bfloat16',
|
|
'uint64_to_bfloat16_scalbn',
|
|
'uint64_to_float16',
|
|
'uint64_to_float16_scalbn',
|
|
'uint64_to_float32',
|
|
'uint64_to_float32_scalbn',
|
|
'uint64_to_float64',
|
|
'uint64_to_float64_scalbn',
|
|
'unassigned_io_ops',
|
|
'unassigned_io_read',
|
|
'unassigned_io_write',
|
|
'unassigned_mem_accepts',
|
|
'unassigned_mem_ops',
|
|
'unassigned_mem_read',
|
|
'unassigned_mem_write',
|
|
'unicorn_free_empty_flat_view',
|
|
'update_spsel',
|
|
'use_idiv_instructions_rt',
|
|
'v6_cp_reginfo',
|
|
'v6k_cp_reginfo',
|
|
'v7_cp_reginfo',
|
|
'v7m_pop',
|
|
'v7m_push',
|
|
'v7mp_cp_reginfo',
|
|
'v8_cp_reginfo',
|
|
'v8_el2_cp_reginfo',
|
|
'v8_el3_cp_reginfo',
|
|
'v8_el3_no_el2_cp_reginfo',
|
|
'vapa_cp_reginfo',
|
|
'vbar_write',
|
|
'vec_gen_2',
|
|
'vec_gen_3',
|
|
'vec_gen_4',
|
|
'vfp_exceptbits_from_host',
|
|
'vfp_exceptbits_to_host',
|
|
'vfp_get_fpcr',
|
|
'vfp_get_fpscr',
|
|
'vfp_get_fpsr',
|
|
'vfp_reg_offset',
|
|
'vfp_set_fpcr',
|
|
'vfp_set_fpscr',
|
|
'vfp_set_fpsr',
|
|
'visit_end_implicit_struct',
|
|
'visit_end_list',
|
|
'visit_end_struct',
|
|
'visit_end_union',
|
|
'visit_get_next_type',
|
|
'visit_next_list',
|
|
'visit_optional',
|
|
'visit_start_implicit_struct',
|
|
'visit_start_list',
|
|
'visit_start_struct',
|
|
'visit_start_union',
|
|
'vm_start',
|
|
'vmsa_cp_reginfo',
|
|
'vmsa_tcr_el1_write',
|
|
'vmsa_ttbcr_raw_write',
|
|
'vmsa_ttbcr_reset',
|
|
'vmsa_ttbcr_write',
|
|
'vmsa_ttbr_write',
|
|
'write_cpustate_to_list',
|
|
'write_list_to_cpustate',
|
|
'write_raw_cp_reg',
|
|
'write_v7m_exception',
|
|
'x86_ldl_phys',
|
|
'x86_ldq_phys',
|
|
'x86_ldub_phys',
|
|
'x86_lduw_phys',
|
|
'x86_op_defs',
|
|
'x86_stb_phys',
|
|
'x86_stl_phys',
|
|
'x86_stl_phys_notdirty',
|
|
'x86_stq_phys',
|
|
'x86_stw_phys',
|
|
'xpsr_read',
|
|
'xpsr_write',
|
|
'xscale_cp_reginfo',
|
|
'xscale_cpar_write',
|
|
)
|
|
|
|
arm_symbols = (
|
|
'aa64_va_parameters',
|
|
'aa64_va_parameters_both',
|
|
'aarch64_translator_ops',
|
|
'arm_cpu_tlb_fill',
|
|
'arm_v7m_mmu_idx_all',
|
|
'arm_v7m_mmu_idx_for_secstate',
|
|
'arm_v7m_mmu_idx_for_secstate_and_priv',
|
|
'ARM_REGS_STORAGE_SIZE',
|
|
'arm_hcr_el2_eff',
|
|
'arm_mmu_idx',
|
|
'arm_mmu_idx_el',
|
|
'arm_mmu_idx_to_el',
|
|
'arm_register_pre_el_change_hook',
|
|
'arm_register_el_change_hook',
|
|
'arm_reset_cpu',
|
|
'arm_sctlr',
|
|
'arm_set_cpu_off',
|
|
'arm_set_cpu_on',
|
|
'arm_stage1_mmu_idx',
|
|
'cpu_mmu_index',
|
|
'fp_exception_el',
|
|
'gen_cmtst_i64',
|
|
'gen_gvec_ceq0',
|
|
'gen_gvec_cge0',
|
|
'gen_gvec_cgt0',
|
|
'gen_gvec_cle0',
|
|
'gen_gvec_clt0',
|
|
'gen_gvec_cmtst',
|
|
'gen_gvec_mla',
|
|
'gen_gvec_mls',
|
|
'gen_gvec_rax1',
|
|
'gen_gvec_saba',
|
|
'gen_gvec_sabd',
|
|
'gen_gvec_sli',
|
|
'gen_gvec_sqadd_qc',
|
|
'gen_gvec_sqrdmlah_qc',
|
|
'gen_gvec_sqrdmlsh_qc',
|
|
'gen_gvec_sqsub_qc',
|
|
'gen_gvec_sri',
|
|
'gen_gvec_srshr',
|
|
'gen_gvec_srsra',
|
|
'gen_gvec_sshl',
|
|
'gen_gvec_ssra',
|
|
'gen_gvec_uaba',
|
|
'gen_gvec_uabd',
|
|
'gen_gvec_uqadd_qc',
|
|
'gen_gvec_uqsub_qc',
|
|
'gen_gvec_ursra',
|
|
'gen_gvec_urshr',
|
|
'gen_gvec_ushl',
|
|
'gen_gvec_usra',
|
|
'gen_mte_check1',
|
|
'gen_mte_checkN',
|
|
'get_phys_addr',
|
|
'gen_sshl_i32',
|
|
'gen_sshl_i64',
|
|
'gen_ushl_i32',
|
|
'gen_ushl_i64',
|
|
'helper_fjcvtzs',
|
|
'helper_gvec_mla_idx_d',
|
|
'helper_gvec_mla_idx_h',
|
|
'helper_gvec_mla_idx_s',
|
|
'helper_gvec_mls_idx_d',
|
|
'helper_gvec_mls_idx_h',
|
|
'helper_gvec_mls_idx_s',
|
|
'helper_gvec_mul_idx_d',
|
|
'helper_gvec_mul_idx_h',
|
|
'helper_gvec_mul_idx_s',
|
|
'helper_gvec_saba_b',
|
|
'helper_gvec_saba_d',
|
|
'helper_gvec_saba_h',
|
|
'helper_gvec_saba_s',
|
|
'helper_gvec_sabd_b',
|
|
'helper_gvec_sabd_d',
|
|
'helper_gvec_sabd_h',
|
|
'helper_gvec_sabd_s',
|
|
'helper_gvec_sli_b',
|
|
'helper_gvec_sli_d',
|
|
'helper_gvec_sli_h',
|
|
'helper_gvec_sli_s',
|
|
'helper_gvec_sri_b',
|
|
'helper_gvec_sri_d',
|
|
'helper_gvec_sri_h',
|
|
'helper_gvec_sri_s',
|
|
'helper_gvec_srshr_b',
|
|
'helper_gvec_srshr_d',
|
|
'helper_gvec_srshr_h',
|
|
'helper_gvec_srshr_s',
|
|
'helper_gvec_srsra_b',
|
|
'helper_gvec_srsra_d',
|
|
'helper_gvec_srsra_h',
|
|
'helper_gvec_srsra_s',
|
|
'helper_gvec_ssra_b',
|
|
'helper_gvec_ssra_d',
|
|
'helper_gvec_ssra_h',
|
|
'helper_gvec_ssra_s',
|
|
'helper_gvec_uaba_b',
|
|
'helper_gvec_uaba_d',
|
|
'helper_gvec_uaba_h',
|
|
'helper_gvec_uaba_s',
|
|
'helper_gvec_uabd_b',
|
|
'helper_gvec_uabd_d',
|
|
'helper_gvec_uabd_h',
|
|
'helper_gvec_uabd_s',
|
|
'helper_gvec_urshr_b',
|
|
'helper_gvec_urshr_d',
|
|
'helper_gvec_urshr_h',
|
|
'helper_gvec_urshr_s',
|
|
'helper_gvec_ursra_b',
|
|
'helper_gvec_ursra_d',
|
|
'helper_gvec_ursra_h',
|
|
'helper_gvec_ursra_s',
|
|
'helper_gvec_usra_b',
|
|
'helper_gvec_usra_d',
|
|
'helper_gvec_usra_h',
|
|
'helper_gvec_usra_s',
|
|
'helper_probe_access_armfn',
|
|
'helper_vjcvt',
|
|
'mte_check1_',
|
|
'mte_checkN_',
|
|
'mte_probe1',
|
|
'pmu_init',
|
|
'pmsav8_mpu_lookup',
|
|
'pmu_op_start',
|
|
'pmu_op_finish',
|
|
'pmu_pre_el_change',
|
|
'pmu_post_el_change',
|
|
'raise_exception',
|
|
'raise_exception_ra',
|
|
'sqadd_op',
|
|
'sqsub_op',
|
|
'sve_exception_el',
|
|
'sve_zcr_len_for_el',
|
|
'uqadd_op',
|
|
'uqsub_op',
|
|
'v8m_security_lookup',
|
|
'vfp_expand_imm',
|
|
)
|
|
|
|
aarch64_symbols = (
|
|
'ARM64_REGS_STORAGE_SIZE',
|
|
'aa64_va_parameters',
|
|
'aa64_va_parameters_both',
|
|
'aarch64_cpu_do_interrupt',
|
|
'aarch64_cpu_register_types',
|
|
'aarch64_sve_change_el',
|
|
'aarch64_sve_narrow_vq',
|
|
'aarch64_translator_ops',
|
|
'arm64_reg_read',
|
|
'arm64_reg_reset',
|
|
'arm64_reg_write',
|
|
'arm64_release',
|
|
'arm_cpu_tlb_fill',
|
|
'arm_v7m_mmu_idx_all',
|
|
'arm_v7m_mmu_idx_for_secstate',
|
|
'arm_v7m_mmu_idx_for_secstate_and_priv',
|
|
'arm_hcr_el2_eff',
|
|
'arm_mmu_idx',
|
|
'arm_mmu_idx_el',
|
|
'arm_mmu_idx_to_el',
|
|
'arm_register_pre_el_change_hook',
|
|
'arm_register_el_change_hook',
|
|
'arm_reset_cpu',
|
|
'arm_sctlr',
|
|
'arm_set_cpu_off',
|
|
'arm_set_cpu_on',
|
|
'arm_stage1_mmu_idx',
|
|
'bif_op',
|
|
'bit_op',
|
|
'bsl_op',
|
|
'clean_data_tbi',
|
|
'cpu_mmu_index',
|
|
'cpu_reg',
|
|
'cpu_reg_sp',
|
|
'disas_sve',
|
|
'fp_exception_el',
|
|
'gen_a64_set_pc_im',
|
|
'gen_cmtst_i64',
|
|
'gen_gvec_ceq0',
|
|
'gen_gvec_cge0',
|
|
'gen_gvec_cgt0',
|
|
'gen_gvec_cle0',
|
|
'gen_gvec_clt0',
|
|
'gen_gvec_cmtst',
|
|
'gen_gvec_mla',
|
|
'gen_gvec_mls',
|
|
'gen_gvec_rax1',
|
|
'gen_gvec_saba',
|
|
'gen_gvec_sabd',
|
|
'gen_gvec_sli',
|
|
'gen_gvec_sqadd_qc',
|
|
'gen_gvec_sqrdmlah_qc',
|
|
'gen_gvec_sqrdmlsh_qc',
|
|
'gen_gvec_sqsub_qc',
|
|
'gen_gvec_sri',
|
|
'gen_gvec_srshr',
|
|
'gen_gvec_srsra',
|
|
'gen_gvec_sshl',
|
|
'gen_gvec_ssra',
|
|
'gen_gvec_uaba',
|
|
'gen_gvec_uabd',
|
|
'gen_gvec_uqadd_qc',
|
|
'gen_gvec_uqsub_qc',
|
|
'gen_gvec_ursra',
|
|
'gen_gvec_urshr',
|
|
'gen_gvec_ushl',
|
|
'gen_gvec_usra',
|
|
'gen_mte_check1',
|
|
'gen_mte_checkN',
|
|
'get_phys_addr',
|
|
'gen_sshl_i32',
|
|
'gen_sshl_i64',
|
|
'gen_ushl_i32',
|
|
'gen_ushl_i64',
|
|
'pmu_init',
|
|
'helper_addsubg',
|
|
'helper_advsimd_acge_f16',
|
|
'helper_advsimd_acgt_f16',
|
|
'helper_advsimd_add2h',
|
|
'helper_advsimd_addh',
|
|
'helper_advsimd_ceq_f16',
|
|
'helper_advsimd_cge_f16',
|
|
'helper_advsimd_cgt_f16',
|
|
'helper_advsimd_div2h',
|
|
'helper_advsimd_divh',
|
|
'helper_advsimd_f16tosinth',
|
|
'helper_advsimd_f16touinth',
|
|
'helper_advsimd_max2h',
|
|
'helper_advsimd_maxh',
|
|
'helper_advsimd_maxnum2h',
|
|
'helper_advsimd_maxnumh',
|
|
'helper_advsimd_min2h',
|
|
'helper_advsimd_minh',
|
|
'helper_advsimd_minnum2h',
|
|
'helper_advsimd_minnumh',
|
|
'helper_advsimd_muladdh',
|
|
'helper_advsimd_muladd2h',
|
|
'helper_advsimd_mul2h',
|
|
'helper_advsimd_mulh',
|
|
'helper_advsimd_mulx2h',
|
|
'helper_advsimd_mulxh',
|
|
'helper_advsimd_rinth',
|
|
'helper_advsimd_rinth_exact',
|
|
'helper_advsimd_sub2h',
|
|
'helper_advsimd_subh',
|
|
'helper_autda',
|
|
'helper_autdb',
|
|
'helper_autia',
|
|
'helper_autib',
|
|
'helper_casp_be_parallel',
|
|
'helper_casp_le_parallel',
|
|
'helper_crc32_64',
|
|
'helper_crc32c_64',
|
|
'helper_fcvtx_f64_to_f32',
|
|
'helper_frecpx_f16',
|
|
'helper_frecpx_f32',
|
|
'helper_frecpx_f64',
|
|
'helper_fjcvtzs',
|
|
'helper_gvec_mla_idx_d',
|
|
'helper_gvec_mla_idx_h',
|
|
'helper_gvec_mla_idx_s',
|
|
'helper_gvec_mls_idx_d',
|
|
'helper_gvec_mls_idx_h',
|
|
'helper_gvec_mls_idx_s',
|
|
'helper_gvec_mul_idx_d',
|
|
'helper_gvec_mul_idx_h',
|
|
'helper_gvec_mul_idx_s',
|
|
'helper_gvec_recps_d',
|
|
'helper_gvec_recps_h',
|
|
'helper_gvec_recps_s',
|
|
'helper_gvec_rsqrts_d',
|
|
'helper_gvec_rsqrts_h',
|
|
'helper_gvec_rsqrts_s',
|
|
'helper_gvec_saba_b',
|
|
'helper_gvec_saba_d',
|
|
'helper_gvec_saba_h',
|
|
'helper_gvec_saba_s',
|
|
'helper_gvec_sabd_b',
|
|
'helper_gvec_sabd_d',
|
|
'helper_gvec_sabd_h',
|
|
'helper_gvec_sabd_s',
|
|
'helper_gvec_sli_b',
|
|
'helper_gvec_sli_d',
|
|
'helper_gvec_sli_h',
|
|
'helper_gvec_sli_s',
|
|
'helper_gvec_sri_b',
|
|
'helper_gvec_sri_d',
|
|
'helper_gvec_sri_h',
|
|
'helper_gvec_sri_s',
|
|
'helper_gvec_srshr_b',
|
|
'helper_gvec_srshr_d',
|
|
'helper_gvec_srshr_h',
|
|
'helper_gvec_srshr_s',
|
|
'helper_gvec_srsra_b',
|
|
'helper_gvec_srsra_d',
|
|
'helper_gvec_srsra_h',
|
|
'helper_gvec_srsra_s',
|
|
'helper_gvec_ssra_b',
|
|
'helper_gvec_ssra_d',
|
|
'helper_gvec_ssra_h',
|
|
'helper_gvec_ssra_s',
|
|
'helper_gvec_uaba_b',
|
|
'helper_gvec_uaba_d',
|
|
'helper_gvec_uaba_h',
|
|
'helper_gvec_uaba_s',
|
|
'helper_gvec_uabd_b',
|
|
'helper_gvec_uabd_d',
|
|
'helper_gvec_uabd_h',
|
|
'helper_gvec_uabd_s',
|
|
'helper_gvec_urshr_b',
|
|
'helper_gvec_urshr_d',
|
|
'helper_gvec_urshr_h',
|
|
'helper_gvec_urshr_s',
|
|
'helper_gvec_ursra_b',
|
|
'helper_gvec_ursra_d',
|
|
'helper_gvec_ursra_h',
|
|
'helper_gvec_ursra_s',
|
|
'helper_gvec_usra_b',
|
|
'helper_gvec_usra_d',
|
|
'helper_gvec_usra_h',
|
|
'helper_gvec_usra_s',
|
|
'helper_irg',
|
|
'helper_ldg',
|
|
'helper_ldgm',
|
|
'helper_msr_i_daifclear',
|
|
'helper_msr_i_daifset',
|
|
'helper_msr_i_spsel',
|
|
'helper_mte_check_1',
|
|
'helper_mte_check_N',
|
|
'helper_mte_check_zva',
|
|
'helper_neon_addlp_s16',
|
|
'helper_neon_addlp_s8',
|
|
'helper_neon_addlp_u16',
|
|
'helper_neon_addlp_u8',
|
|
'helper_neon_ceq_f64',
|
|
'helper_neon_cge_f64',
|
|
'helper_neon_cgt_f64',
|
|
'helper_neon_sqdmulh_h',
|
|
'helper_neon_sqdmulh_s',
|
|
'helper_neon_sqrdmulh_h',
|
|
'helper_neon_sqrdmulh_s',
|
|
'helper_pacda',
|
|
'helper_pacdb',
|
|
'helper_pacga',
|
|
'helper_pacia',
|
|
'helper_pacib',
|
|
'helper_paired_cmpxchg64_be',
|
|
'helper_paired_cmpxchg64_be_parallel',
|
|
'helper_paired_cmpxchg64_le',
|
|
'helper_paired_cmpxchg64_le_parallel',
|
|
'helper_probe_access_armfn',
|
|
'helper_rbit64',
|
|
'helper_recpsf_f16',
|
|
'helper_recpsf_f32',
|
|
'helper_recpsf_f64',
|
|
'helper_rsqrtsf_f16',
|
|
'helper_rsqrtsf_f32',
|
|
'helper_rsqrtsf_f64',
|
|
'helper_sdiv64',
|
|
'helper_simd_tblx',
|
|
'helper_sqrt_f16',
|
|
'helper_st2g',
|
|
'helper_st2g_parallel',
|
|
'helper_st2g_stub',
|
|
'helper_stg',
|
|
'helper_stg_parallel',
|
|
'helper_stg_stub',
|
|
'helper_stgm',
|
|
'helper_stzgm_tags',
|
|
'helper_sve_abs_b',
|
|
'helper_sve_abs_d',
|
|
'helper_sve_abs_h',
|
|
'helper_sve_abs_s',
|
|
'helper_sve_add_zpzz_b',
|
|
'helper_sve_add_zpzz_d',
|
|
'helper_sve_add_zpzz_h',
|
|
'helper_sve_add_zpzz_s',
|
|
'helper_sve_adr_p32',
|
|
'helper_sve_adr_p64',
|
|
'helper_sve_adr_s32',
|
|
'helper_sve_adr_u32',
|
|
'helper_sve_and_pppp',
|
|
'helper_sve_and_zpzz_b',
|
|
'helper_sve_and_zpzz_d',
|
|
'helper_sve_and_zpzz_h',
|
|
'helper_sve_and_zpzz_s',
|
|
'helper_sve_andv_b',
|
|
'helper_sve_andv_d',
|
|
'helper_sve_andv_h',
|
|
'helper_sve_andv_s',
|
|
'helper_sve_asr_zpzw_b',
|
|
'helper_sve_asr_zpzw_h',
|
|
'helper_sve_asr_zpzw_s',
|
|
'helper_sve_asr_zpzz_b',
|
|
'helper_sve_asr_zpzz_d',
|
|
'helper_sve_asr_zpzz_h',
|
|
'helper_sve_asr_zpzz_s',
|
|
'helper_sve_asr_zzw_b',
|
|
'helper_sve_asr_zzw_h',
|
|
'helper_sve_asr_zzw_s',
|
|
'helper_sve_asrd_b',
|
|
'helper_sve_asrd_d',
|
|
'helper_sve_asrd_h',
|
|
'helper_sve_asrd_s',
|
|
'helper_sve_asr_zpzi_b',
|
|
'helper_sve_asr_zpzi_d',
|
|
'helper_sve_asr_zpzi_h',
|
|
'helper_sve_asr_zpzi_s',
|
|
'helper_sve_bic_pppp',
|
|
'helper_sve_bic_zpzz_b',
|
|
'helper_sve_bic_zpzz_d',
|
|
'helper_sve_bic_zpzz_h',
|
|
'helper_sve_bic_zpzz_s',
|
|
'helper_sve_brka_m',
|
|
'helper_sve_brkas_m',
|
|
'helper_sve_brka_z',
|
|
'helper_sve_brkas_z',
|
|
'helper_sve_brkb_m',
|
|
'helper_sve_brkbs_m',
|
|
'helper_sve_brkb_z',
|
|
'helper_sve_brkbs_z',
|
|
'helper_sve_brkn',
|
|
'helper_sve_brkns',
|
|
'helper_sve_brkpa',
|
|
'helper_sve_brkpas',
|
|
'helper_sve_brkpb',
|
|
'helper_sve_brkpbs',
|
|
'helper_sve_cls_b',
|
|
'helper_sve_cls_d',
|
|
'helper_sve_cls_h',
|
|
'helper_sve_cls_s',
|
|
'helper_sve_clz_b',
|
|
'helper_sve_clz_d',
|
|
'helper_sve_clz_h',
|
|
'helper_sve_clz_s',
|
|
'helper_sve_cmpeq_ppzi_b',
|
|
'helper_sve_cmpeq_ppzw_b',
|
|
'helper_sve_cmpeq_ppzz_b',
|
|
'helper_sve_cmpeq_ppzi_d',
|
|
'helper_sve_cmpeq_ppzw_d',
|
|
'helper_sve_cmpeq_ppzz_d',
|
|
'helper_sve_cmpeq_ppzi_h',
|
|
'helper_sve_cmpeq_ppzw_h',
|
|
'helper_sve_cmpeq_ppzz_h',
|
|
'helper_sve_cmpeq_ppzi_s',
|
|
'helper_sve_cmpeq_ppzw_s',
|
|
'helper_sve_cmpeq_ppzz_s',
|
|
'helper_sve_cmpge_ppzi_b',
|
|
'helper_sve_cmpge_ppzw_b',
|
|
'helper_sve_cmpge_ppzz_b',
|
|
'helper_sve_cmpge_ppzi_d',
|
|
'helper_sve_cmpge_ppzw_d',
|
|
'helper_sve_cmpge_ppzz_d',
|
|
'helper_sve_cmpge_ppzi_h',
|
|
'helper_sve_cmpge_ppzw_h',
|
|
'helper_sve_cmpge_ppzz_h',
|
|
'helper_sve_cmpge_ppzi_s',
|
|
'helper_sve_cmpge_ppzw_s',
|
|
'helper_sve_cmpge_ppzz_s',
|
|
'helper_sve_cmpgt_ppzi_b',
|
|
'helper_sve_cmpgt_ppzw_b',
|
|
'helper_sve_cmpgt_ppzz_b',
|
|
'helper_sve_cmpgt_ppzi_d',
|
|
'helper_sve_cmpgt_ppzw_d',
|
|
'helper_sve_cmpgt_ppzz_d',
|
|
'helper_sve_cmpgt_ppzi_h',
|
|
'helper_sve_cmpgt_ppzw_h',
|
|
'helper_sve_cmpgt_ppzz_h',
|
|
'helper_sve_cmpgt_ppzi_s',
|
|
'helper_sve_cmpgt_ppzw_s',
|
|
'helper_sve_cmpgt_ppzz_s',
|
|
'helper_sve_cmphi_ppzi_b',
|
|
'helper_sve_cmphi_ppzw_b',
|
|
'helper_sve_cmphi_ppzz_b',
|
|
'helper_sve_cmphi_ppzi_d',
|
|
'helper_sve_cmphi_ppzw_d',
|
|
'helper_sve_cmphi_ppzz_d',
|
|
'helper_sve_cmphi_ppzi_h',
|
|
'helper_sve_cmphi_ppzw_h',
|
|
'helper_sve_cmphi_ppzz_h',
|
|
'helper_sve_cmphi_ppzi_s',
|
|
'helper_sve_cmphi_ppzw_s',
|
|
'helper_sve_cmphi_ppzz_s',
|
|
'helper_sve_cmphs_ppzi_b',
|
|
'helper_sve_cmphs_ppzw_b',
|
|
'helper_sve_cmphs_ppzz_b',
|
|
'helper_sve_cmphs_ppzi_d',
|
|
'helper_sve_cmphs_ppzw_d',
|
|
'helper_sve_cmphs_ppzz_d',
|
|
'helper_sve_cmphs_ppzi_h',
|
|
'helper_sve_cmphs_ppzw_h',
|
|
'helper_sve_cmphs_ppzz_h',
|
|
'helper_sve_cmphs_ppzi_s',
|
|
'helper_sve_cmphs_ppzw_s',
|
|
'helper_sve_cmphs_ppzz_s',
|
|
'helper_sve_cmple_ppzi_b',
|
|
'helper_sve_cmple_ppzw_b',
|
|
'helper_sve_cmple_ppzi_d',
|
|
'helper_sve_cmple_ppzw_d',
|
|
'helper_sve_cmple_ppzi_h',
|
|
'helper_sve_cmple_ppzw_h',
|
|
'helper_sve_cmple_ppzi_s',
|
|
'helper_sve_cmple_ppzw_s',
|
|
'helper_sve_cmplo_ppzi_b',
|
|
'helper_sve_cmplo_ppzw_b',
|
|
'helper_sve_cmplo_ppzi_d',
|
|
'helper_sve_cmplo_ppzw_d',
|
|
'helper_sve_cmplo_ppzi_h',
|
|
'helper_sve_cmplo_ppzw_h',
|
|
'helper_sve_cmplo_ppzi_s',
|
|
'helper_sve_cmplo_ppzw_s',
|
|
'helper_sve_cmpls_ppzi_b',
|
|
'helper_sve_cmpls_ppzw_b',
|
|
'helper_sve_cmpls_ppzi_d',
|
|
'helper_sve_cmpls_ppzw_d',
|
|
'helper_sve_cmpls_ppzi_h',
|
|
'helper_sve_cmpls_ppzw_h',
|
|
'helper_sve_cmpls_ppzi_s',
|
|
'helper_sve_cmpls_ppzw_s',
|
|
'helper_sve_cmplt_ppzi_b',
|
|
'helper_sve_cmplt_ppzw_b',
|
|
'helper_sve_cmplt_ppzi_d',
|
|
'helper_sve_cmplt_ppzw_d',
|
|
'helper_sve_cmplt_ppzi_h',
|
|
'helper_sve_cmplt_ppzw_h',
|
|
'helper_sve_cmplt_ppzi_s',
|
|
'helper_sve_cmplt_ppzw_s',
|
|
'helper_sve_cmpne_ppzi_b',
|
|
'helper_sve_cmpne_ppzw_b',
|
|
'helper_sve_cmpne_ppzz_b',
|
|
'helper_sve_cmpne_ppzi_d',
|
|
'helper_sve_cmpne_ppzw_d',
|
|
'helper_sve_cmpne_ppzz_d',
|
|
'helper_sve_cmpne_ppzi_h',
|
|
'helper_sve_cmpne_ppzw_h',
|
|
'helper_sve_cmpne_ppzz_h',
|
|
'helper_sve_cmpne_ppzi_s',
|
|
'helper_sve_cmpne_ppzw_s',
|
|
'helper_sve_cmpne_ppzz_s',
|
|
'helper_sve_cnot_b',
|
|
'helper_sve_cnot_d',
|
|
'helper_sve_cnot_h',
|
|
'helper_sve_cnot_s',
|
|
'helper_sve_cnt_zpz_b',
|
|
'helper_sve_cnt_zpz_d',
|
|
'helper_sve_cnt_zpz_h',
|
|
'helper_sve_cnt_zpz_s',
|
|
'helper_sve_cntp',
|
|
'helper_sve_compact_d',
|
|
'helper_sve_compact_s',
|
|
'helper_sve_cpy_m_b',
|
|
'helper_sve_cpy_m_d',
|
|
'helper_sve_cpy_m_h',
|
|
'helper_sve_cpy_m_s',
|
|
'helper_sve_cpy_z_b',
|
|
'helper_sve_cpy_z_d',
|
|
'helper_sve_cpy_z_h',
|
|
'helper_sve_cpy_z_s',
|
|
'helper_sve_eor_pppp',
|
|
'helper_sve_eor_zpzz_b',
|
|
'helper_sve_eor_zpzz_d',
|
|
'helper_sve_eor_zpzz_h',
|
|
'helper_sve_eor_zpzz_s',
|
|
'helper_sve_eorv_b',
|
|
'helper_sve_eorv_d',
|
|
'helper_sve_eorv_h',
|
|
'helper_sve_eorv_s',
|
|
'helper_sve_ext',
|
|
'helper_sve_fabd_d',
|
|
'helper_sve_fabd_h',
|
|
'helper_sve_fabd_s',
|
|
'helper_sve_fabs_d',
|
|
'helper_sve_fabs_h',
|
|
'helper_sve_fabs_s',
|
|
'helper_sve_fadd_d',
|
|
'helper_sve_fadd_h',
|
|
'helper_sve_fadd_s',
|
|
'helper_sve_fadda_d',
|
|
'helper_sve_fadda_h',
|
|
'helper_sve_fadda_s',
|
|
'helper_sve_fadds_d',
|
|
'helper_sve_fadds_h',
|
|
'helper_sve_fadds_s',
|
|
'helper_sve_faddv_d',
|
|
'helper_sve_faddv_h',
|
|
'helper_sve_faddv_s',
|
|
'helper_sve_facge_d',
|
|
'helper_sve_facge_h',
|
|
'helper_sve_facge_s',
|
|
'helper_sve_facgt_d',
|
|
'helper_sve_facgt_h',
|
|
'helper_sve_facgt_s',
|
|
'helper_sve_fcadd_d',
|
|
'helper_sve_fcadd_h',
|
|
'helper_sve_fcadd_s',
|
|
'helper_sve_fcmeq_d',
|
|
'helper_sve_fcmeq_h',
|
|
'helper_sve_fcmeq_s',
|
|
'helper_sve_fcmeq0_d',
|
|
'helper_sve_fcmeq0_h',
|
|
'helper_sve_fcmeq0_s',
|
|
'helper_sve_fcmge_d',
|
|
'helper_sve_fcmge_h',
|
|
'helper_sve_fcmge_s',
|
|
'helper_sve_fcmge0_d',
|
|
'helper_sve_fcmge0_h',
|
|
'helper_sve_fcmge0_s',
|
|
'helper_sve_fcmgt_d',
|
|
'helper_sve_fcmgt_h',
|
|
'helper_sve_fcmgt_s',
|
|
'helper_sve_fcmgt0_d',
|
|
'helper_sve_fcmgt0_h',
|
|
'helper_sve_fcmgt0_s',
|
|
'helper_sve_fcmla_zpzzz_d',
|
|
'helper_sve_fcmla_zpzzz_h',
|
|
'helper_sve_fcmla_zpzzz_s',
|
|
'helper_sve_fcmle0_d',
|
|
'helper_sve_fcmle0_h',
|
|
'helper_sve_fcmle0_s',
|
|
'helper_sve_fcmlt0_d',
|
|
'helper_sve_fcmlt0_h',
|
|
'helper_sve_fcmlt0_s',
|
|
'helper_sve_fcmne_d',
|
|
'helper_sve_fcmne_h',
|
|
'helper_sve_fcmne_s',
|
|
'helper_sve_fcmne0_d',
|
|
'helper_sve_fcmne0_h',
|
|
'helper_sve_fcmne0_s',
|
|
'helper_sve_fcmuo_d',
|
|
'helper_sve_fcmuo_h',
|
|
'helper_sve_fcmuo_s',
|
|
'helper_sve_fcvt_dh',
|
|
'helper_sve_fcvt_ds',
|
|
'helper_sve_fcvt_hd',
|
|
'helper_sve_fcvt_hs',
|
|
'helper_sve_fcvt_sd',
|
|
'helper_sve_fcvt_sh',
|
|
'helper_sve_fcvtzs_dd',
|
|
'helper_sve_fcvtzs_ds',
|
|
'helper_sve_fcvtzs_hd',
|
|
'helper_sve_fcvtzs_hh',
|
|
'helper_sve_fcvtzs_hs',
|
|
'helper_sve_fcvtzs_sd',
|
|
'helper_sve_fcvtzs_ss',
|
|
'helper_sve_fcvtzu_dd',
|
|
'helper_sve_fcvtzu_ds',
|
|
'helper_sve_fcvtzu_hd',
|
|
'helper_sve_fcvtzu_hh',
|
|
'helper_sve_fcvtzu_hs',
|
|
'helper_sve_fcvtzu_sd',
|
|
'helper_sve_fcvtzu_ss',
|
|
'helper_sve_fdiv_d',
|
|
'helper_sve_fdiv_h',
|
|
'helper_sve_fdiv_s',
|
|
'helper_sve_fexpa_d',
|
|
'helper_sve_fexpa_h',
|
|
'helper_sve_fexpa_s',
|
|
'helper_sve_fmax_d',
|
|
'helper_sve_fmax_h',
|
|
'helper_sve_fmax_s',
|
|
'helper_sve_fmaxs_d',
|
|
'helper_sve_fmaxs_h',
|
|
'helper_sve_fmaxs_s',
|
|
'helper_sve_fmaxv_d',
|
|
'helper_sve_fmaxv_h',
|
|
'helper_sve_fmaxv_s',
|
|
'helper_sve_fmaxnms_d',
|
|
'helper_sve_fmaxnms_h',
|
|
'helper_sve_fmaxnms_s',
|
|
'helper_sve_fmaxnmv_d',
|
|
'helper_sve_fmaxnmv_h',
|
|
'helper_sve_fmaxnmv_s',
|
|
'helper_sve_fmaxnum_d',
|
|
'helper_sve_fmaxnum_h',
|
|
'helper_sve_fmaxnum_s',
|
|
'helper_sve_fmin_d',
|
|
'helper_sve_fmin_h',
|
|
'helper_sve_fmin_s',
|
|
'helper_sve_fmins_d',
|
|
'helper_sve_fmins_h',
|
|
'helper_sve_fmins_s',
|
|
'helper_sve_fminv_d',
|
|
'helper_sve_fminv_h',
|
|
'helper_sve_fminv_s',
|
|
'helper_sve_fminnms_d',
|
|
'helper_sve_fminnms_h',
|
|
'helper_sve_fminnms_s',
|
|
'helper_sve_fminnmv_d',
|
|
'helper_sve_fminnmv_h',
|
|
'helper_sve_fminnmv_s',
|
|
'helper_sve_fminnum_d',
|
|
'helper_sve_fminnum_h',
|
|
'helper_sve_fminnum_s',
|
|
'helper_sve_fmla_zpzzz_d',
|
|
'helper_sve_fmla_zpzzz_h',
|
|
'helper_sve_fmla_zpzzz_s',
|
|
'helper_sve_fmls_zpzzz_d',
|
|
'helper_sve_fmls_zpzzz_h',
|
|
'helper_sve_fmls_zpzzz_s',
|
|
'helper_sve_fmul_d',
|
|
'helper_sve_fmul_h',
|
|
'helper_sve_fmul_s',
|
|
'helper_sve_fmuls_d',
|
|
'helper_sve_fmuls_h',
|
|
'helper_sve_fmuls_s',
|
|
'helper_sve_fmulx_d',
|
|
'helper_sve_fmulx_h',
|
|
'helper_sve_fmulx_s',
|
|
'helper_sve_fneg_d',
|
|
'helper_sve_fneg_h',
|
|
'helper_sve_fneg_s',
|
|
'helper_sve_fnmla_zpzzz_d',
|
|
'helper_sve_fnmla_zpzzz_h',
|
|
'helper_sve_fnmla_zpzzz_s',
|
|
'helper_sve_fnmls_zpzzz_d',
|
|
'helper_sve_fnmls_zpzzz_h',
|
|
'helper_sve_fnmls_zpzzz_s',
|
|
'helper_sve_frecpx_d',
|
|
'helper_sve_frecpx_h',
|
|
'helper_sve_frecpx_s',
|
|
'helper_sve_frint_d',
|
|
'helper_sve_frint_h',
|
|
'helper_sve_frint_s',
|
|
'helper_sve_frintx_d',
|
|
'helper_sve_frintx_h',
|
|
'helper_sve_frintx_s',
|
|
'helper_sve_fscalbn_d',
|
|
'helper_sve_fscalbn_h',
|
|
'helper_sve_fscalbn_s',
|
|
'helper_sve_fsqrt_d',
|
|
'helper_sve_fsqrt_h',
|
|
'helper_sve_fsqrt_s',
|
|
'helper_sve_fsub_d',
|
|
'helper_sve_fsub_h',
|
|
'helper_sve_fsub_s',
|
|
'helper_sve_fsubrs_d',
|
|
'helper_sve_fsubrs_h',
|
|
'helper_sve_fsubrs_s',
|
|
'helper_sve_fsubs_d',
|
|
'helper_sve_fsubs_h',
|
|
'helper_sve_fsubs_s',
|
|
'helper_sve_ftmad_d',
|
|
'helper_sve_ftmad_h',
|
|
'helper_sve_ftmad_s',
|
|
'helper_sve_ftssel_d',
|
|
'helper_sve_ftssel_h',
|
|
'helper_sve_ftssel_s',
|
|
'helper_sve_index_b',
|
|
'helper_sve_index_d',
|
|
'helper_sve_index_h',
|
|
'helper_sve_index_s',
|
|
'helper_sve_insr_b',
|
|
'helper_sve_insr_d',
|
|
'helper_sve_insr_h',
|
|
'helper_sve_insr_s',
|
|
'helper_sve_last_active_element',
|
|
'helper_sve_ld1bb_r',
|
|
'helper_sve_ld2bb_r',
|
|
'helper_sve_ld3bb_r',
|
|
'helper_sve_ld4bb_r',
|
|
'helper_sve_ld1bdu_r',
|
|
'helper_sve_ld1bhu_r',
|
|
'helper_sve_ld1bds_r',
|
|
'helper_sve_ld1bhs_r',
|
|
'helper_sve_ld1bss_r',
|
|
'helper_sve_ld1bsu_r',
|
|
'helper_sve_ld1hds_be_r',
|
|
'helper_sve_ld1hds_le_r',
|
|
'helper_sve_ld1hdu_be_r',
|
|
'helper_sve_ld1hdu_le_r',
|
|
'helper_sve_ld1hss_be_r',
|
|
'helper_sve_ld1hss_le_r',
|
|
'helper_sve_ld1hsu_be_r',
|
|
'helper_sve_ld1hsu_le_r',
|
|
'helper_sve_ld1sds_be_r',
|
|
'helper_sve_ld1sds_le_r',
|
|
'helper_sve_ld1sdu_be_r',
|
|
'helper_sve_ld1sdu_le_r',
|
|
'helper_sve_ld1dd_be_r',
|
|
'helper_sve_ld1dd_le_r',
|
|
'helper_sve_ld2dd_be_r',
|
|
'helper_sve_ld2dd_le_r',
|
|
'helper_sve_ld3dd_be_r',
|
|
'helper_sve_ld3dd_le_r',
|
|
'helper_sve_ld4dd_be_r',
|
|
'helper_sve_ld4dd_le_r',
|
|
'helper_sve_ld1hh_be_r',
|
|
'helper_sve_ld1hh_le_r',
|
|
'helper_sve_ld2hh_be_r',
|
|
'helper_sve_ld2hh_le_r',
|
|
'helper_sve_ld3hh_be_r',
|
|
'helper_sve_ld3hh_le_r',
|
|
'helper_sve_ld4hh_be_r',
|
|
'helper_sve_ld4hh_le_r',
|
|
'helper_sve_ld1ss_be_r',
|
|
'helper_sve_ld1ss_le_r',
|
|
'helper_sve_ld2ss_be_r',
|
|
'helper_sve_ld2ss_le_r',
|
|
'helper_sve_ld3ss_be_r',
|
|
'helper_sve_ld3ss_le_r',
|
|
'helper_sve_ld4ss_be_r',
|
|
'helper_sve_ld4ss_le_r',
|
|
'helper_sve_ldbdu_zd',
|
|
'helper_sve_ldbdu_zss',
|
|
'helper_sve_ldbdu_zsu',
|
|
'helper_sve_ldbss_zd',
|
|
'helper_sve_ldbss_zss',
|
|
'helper_sve_ldbss_zsu',
|
|
'helper_sve_ldbsu_zsu_mte',
|
|
'helper_sve_ldhsu_le_zsu_mte',
|
|
'helper_sve_ldhsu_be_zsu_mte',
|
|
'helper_sve_ldss_le_zsu_mte',
|
|
'helper_sve_ldss_be_zsu_mte',
|
|
'helper_sve_ldbss_zsu_mte',
|
|
'helper_sve_ldhss_le_zsu_mte',
|
|
'helper_sve_ldhss_be_zsu_mte',
|
|
'helper_sve_ldbsu_zss_mte',
|
|
'helper_sve_ldhsu_le_zss_mte',
|
|
'helper_sve_ldhsu_be_zss_mte',
|
|
'helper_sve_ldss_le_zss_mte',
|
|
'helper_sve_ldss_be_zss_mte',
|
|
'helper_sve_ldbss_zss_mte',
|
|
'helper_sve_ldhss_le_zss_mte',
|
|
'helper_sve_ldhss_be_zss_mte',
|
|
'helper_sve_ldbdu_zsu_mte',
|
|
'helper_sve_ldhdu_le_zsu_mte',
|
|
'helper_sve_ldhdu_be_zsu_mte',
|
|
'helper_sve_ldsdu_le_zsu_mte',
|
|
'helper_sve_ldsdu_be_zsu_mte',
|
|
'helper_sve_lddd_le_zsu_mte',
|
|
'helper_sve_lddd_be_zsu_mte',
|
|
'helper_sve_ldbds_zsu_mte',
|
|
'helper_sve_ldhds_le_zsu_mte',
|
|
'helper_sve_ldhds_be_zsu_mte',
|
|
'helper_sve_ldsds_le_zsu_mte',
|
|
'helper_sve_ldsds_be_zsu_mte',
|
|
'helper_sve_ldbdu_zss_mte',
|
|
'helper_sve_ldhdu_le_zss_mte',
|
|
'helper_sve_ldhdu_be_zss_mte',
|
|
'helper_sve_ldsdu_le_zss_mte',
|
|
'helper_sve_ldsdu_be_zss_mte',
|
|
'helper_sve_lddd_le_zss_mte',
|
|
'helper_sve_lddd_be_zss_mte',
|
|
'helper_sve_ldbds_zss_mte',
|
|
'helper_sve_ldhds_le_zss_mte',
|
|
'helper_sve_ldhds_be_zss_mte',
|
|
'helper_sve_ldsds_le_zss_mte',
|
|
'helper_sve_ldsds_be_zss_mte',
|
|
'helper_sve_ldbdu_zd_mte',
|
|
'helper_sve_ldhdu_le_zd_mte',
|
|
'helper_sve_ldhdu_be_zd_mte',
|
|
'helper_sve_ldsdu_le_zd_mte',
|
|
'helper_sve_ldsdu_be_zd_mte',
|
|
'helper_sve_lddd_le_zd_mte',
|
|
'helper_sve_lddd_be_zd_mte',
|
|
'helper_sve_ldbds_zd_mte',
|
|
'helper_sve_ldhds_le_zd_mte',
|
|
'helper_sve_ldhds_be_zd_mte',
|
|
'helper_sve_ldsds_le_zd_mte',
|
|
'helper_sve_ldsds_be_zd_mte',
|
|
'helper_sve_ldbsu_zss',
|
|
'helper_sve_ldbsu_zsu',
|
|
'helper_sve_ldbds_zd',
|
|
'helper_sve_ldbds_zss',
|
|
'helper_sve_ldbds_zsu',
|
|
'helper_sve_lddd_be_zd',
|
|
'helper_sve_lddd_le_zd',
|
|
'helper_sve_lddd_be_zss',
|
|
'helper_sve_lddd_le_zss',
|
|
'helper_sve_lddd_be_zsu',
|
|
'helper_sve_lddd_le_zsu',
|
|
'helper_sve_ldhss_be_zss',
|
|
'helper_sve_ldhss_le_zss',
|
|
'helper_sve_ldhds_be_zd',
|
|
'helper_sve_ldhds_le_zd',
|
|
'helper_sve_ldhds_be_zss',
|
|
'helper_sve_ldhds_le_zss',
|
|
'helper_sve_ldhds_be_zsu',
|
|
'helper_sve_ldhds_le_zsu',
|
|
'helper_sve_ldhdu_be_zd',
|
|
'helper_sve_ldhdu_le_zd',
|
|
'helper_sve_ldhdu_be_zss',
|
|
'helper_sve_ldhdu_le_zss',
|
|
'helper_sve_ldhdu_be_zsu',
|
|
'helper_sve_ldhdu_le_zsu',
|
|
'helper_sve_ldhss_be_zsu',
|
|
'helper_sve_ldhss_le_zsu',
|
|
'helper_sve_ldhsu_be_zss',
|
|
'helper_sve_ldhsu_le_zss',
|
|
'helper_sve_ldhsu_be_zsu',
|
|
'helper_sve_ldhsu_le_zsu',
|
|
'helper_sve_ld1bb_r_mte',
|
|
'helper_sve_ld2bb_r_mte',
|
|
'helper_sve_ld3bb_r_mte',
|
|
'helper_sve_ld4bb_r_mte',
|
|
'helper_sve_ld1hh_le_r_mte',
|
|
'helper_sve_ld2hh_le_r_mte',
|
|
'helper_sve_ld3hh_le_r_mte',
|
|
'helper_sve_ld4hh_le_r_mte',
|
|
'helper_sve_ld1hh_be_r_mte',
|
|
'helper_sve_ld2hh_be_r_mte',
|
|
'helper_sve_ld3hh_be_r_mte',
|
|
'helper_sve_ld4hh_be_r_mte',
|
|
'helper_sve_ld1ss_le_r_mte',
|
|
'helper_sve_ld2ss_le_r_mte',
|
|
'helper_sve_ld3ss_le_r_mte',
|
|
'helper_sve_ld4ss_le_r_mte',
|
|
'helper_sve_ld1ss_be_r_mte',
|
|
'helper_sve_ld2ss_be_r_mte',
|
|
'helper_sve_ld3ss_be_r_mte',
|
|
'helper_sve_ld4ss_be_r_mte',
|
|
'helper_sve_ld1dd_le_r_mte',
|
|
'helper_sve_ld2dd_le_r_mte',
|
|
'helper_sve_ld3dd_le_r_mte',
|
|
'helper_sve_ld4dd_le_r_mte',
|
|
'helper_sve_ld1dd_be_r_mte',
|
|
'helper_sve_ld2dd_be_r_mte',
|
|
'helper_sve_ld3dd_be_r_mte',
|
|
'helper_sve_ld4dd_be_r_mte',
|
|
'helper_sve_ld1bhu_r_mte',
|
|
'helper_sve_ld1bsu_r_mte',
|
|
'helper_sve_ld1bdu_r_mte',
|
|
'helper_sve_ld1bhs_r_mte',
|
|
'helper_sve_ld1bss_r_mte',
|
|
'helper_sve_ld1bds_r_mte',
|
|
'helper_sve_ld1hsu_le_r_mte',
|
|
'helper_sve_ld1hdu_le_r_mte',
|
|
'helper_sve_ld1hss_le_r_mte',
|
|
'helper_sve_ld1hds_le_r_mte',
|
|
'helper_sve_ld1hsu_be_r_mte',
|
|
'helper_sve_ld1hdu_be_r_mte',
|
|
'helper_sve_ld1hss_be_r_mte',
|
|
'helper_sve_ld1hds_be_r_mte',
|
|
'helper_sve_ld1sdu_le_r_mte',
|
|
'helper_sve_ld1sds_le_r_mte',
|
|
'helper_sve_ld1sdu_be_r_mte',
|
|
'helper_sve_ld1sds_be_r_mte',
|
|
'helper_sve_ldsds_be_zd',
|
|
'helper_sve_ldsds_le_zd',
|
|
'helper_sve_ldsds_be_zss',
|
|
'helper_sve_ldsds_le_zss',
|
|
'helper_sve_ldsds_be_zsu',
|
|
'helper_sve_ldsds_le_zsu',
|
|
'helper_sve_ldsdu_be_zd',
|
|
'helper_sve_ldsdu_le_zd',
|
|
'helper_sve_ldsdu_be_zss',
|
|
'helper_sve_ldsdu_le_zss',
|
|
'helper_sve_ldsdu_be_zsu',
|
|
'helper_sve_ldsdu_le_zsu',
|
|
'helper_sve_ldss_be_zss',
|
|
'helper_sve_ldss_le_zss',
|
|
'helper_sve_ldss_be_zsu',
|
|
'helper_sve_ldss_le_zsu',
|
|
'helper_sve_ldff1bb_r_mte',
|
|
'helper_sve_ldff1bhu_r_mte',
|
|
'helper_sve_ldff1bsu_r_mte',
|
|
'helper_sve_ldff1bdu_r_mte',
|
|
'helper_sve_ldff1bhs_r_mte',
|
|
'helper_sve_ldff1bss_r_mte',
|
|
'helper_sve_ldff1bds_r_mte',
|
|
'helper_sve_ldff1hh_le_r_mte',
|
|
'helper_sve_ldff1hsu_le_r_mte',
|
|
'helper_sve_ldff1hdu_le_r_mte',
|
|
'helper_sve_ldff1hss_le_r_mte',
|
|
'helper_sve_ldff1hds_le_r_mte',
|
|
'helper_sve_ldff1hh_be_r_mte',
|
|
'helper_sve_ldff1hsu_be_r_mte',
|
|
'helper_sve_ldff1hdu_be_r_mte',
|
|
'helper_sve_ldff1hss_be_r_mte',
|
|
'helper_sve_ldff1hds_be_r_mte',
|
|
'helper_sve_ldff1ss_le_r_mte',
|
|
'helper_sve_ldff1sdu_le_r_mte',
|
|
'helper_sve_ldff1sds_le_r_mte',
|
|
'helper_sve_ldff1ss_be_r_mte',
|
|
'helper_sve_ldff1sdu_be_r_mte',
|
|
'helper_sve_ldff1sds_be_r_mte',
|
|
'helper_sve_ldff1dd_le_r_mte',
|
|
'helper_sve_ldff1dd_be_r_mte',
|
|
'helper_sve_ldff1bb_r',
|
|
'helper_sve_ldff1bds_r',
|
|
'helper_sve_ldff1bdu_r',
|
|
'helper_sve_ldff1bhs_r',
|
|
'helper_sve_ldff1bhu_r',
|
|
'helper_sve_ldff1bss_r',
|
|
'helper_sve_ldff1bsu_r',
|
|
'helper_sve_ldff1dd_be_r',
|
|
'helper_sve_ldff1dd_le_r',
|
|
'helper_sve_ldff1hh_be_r',
|
|
'helper_sve_ldff1hh_le_r',
|
|
'helper_sve_ldff1hds_be_r',
|
|
'helper_sve_ldff1hds_le_r',
|
|
'helper_sve_ldff1hdu_be_r',
|
|
'helper_sve_ldff1hdu_le_r',
|
|
'helper_sve_ldff1hss_be_r',
|
|
'helper_sve_ldff1hss_le_r',
|
|
'helper_sve_ldff1hsu_be_r',
|
|
'helper_sve_ldff1hsu_le_r',
|
|
'helper_sve_ldff1ss_be_r',
|
|
'helper_sve_ldff1ss_le_r',
|
|
'helper_sve_ldff1sds_be_r',
|
|
'helper_sve_ldff1sds_le_r',
|
|
'helper_sve_ldff1sdu_be_r',
|
|
'helper_sve_ldff1sdu_le_r',
|
|
'helper_sve_ldnf1bb_r_mte',
|
|
'helper_sve_ldnf1bhu_r_mte',
|
|
'helper_sve_ldnf1bsu_r_mte',
|
|
'helper_sve_ldnf1bdu_r_mte',
|
|
'helper_sve_ldnf1bhs_r_mte',
|
|
'helper_sve_ldnf1bss_r_mte',
|
|
'helper_sve_ldnf1bds_r_mte',
|
|
'helper_sve_ldnf1hh_le_r_mte',
|
|
'helper_sve_ldnf1hsu_le_r_mte',
|
|
'helper_sve_ldnf1hdu_le_r_mte',
|
|
'helper_sve_ldnf1hss_le_r_mte',
|
|
'helper_sve_ldnf1hds_le_r_mte',
|
|
'helper_sve_ldnf1hh_be_r_mte',
|
|
'helper_sve_ldnf1hsu_be_r_mte',
|
|
'helper_sve_ldnf1hdu_be_r_mte',
|
|
'helper_sve_ldnf1hss_be_r_mte',
|
|
'helper_sve_ldnf1hds_be_r_mte',
|
|
'helper_sve_ldnf1ss_le_r_mte',
|
|
'helper_sve_ldnf1sdu_le_r_mte',
|
|
'helper_sve_ldnf1sds_le_r_mte',
|
|
'helper_sve_ldnf1ss_be_r_mte',
|
|
'helper_sve_ldnf1sdu_be_r_mte',
|
|
'helper_sve_ldnf1sds_be_r_mte',
|
|
'helper_sve_ldnf1dd_le_r_mte',
|
|
'helper_sve_ldnf1dd_be_r_mte',
|
|
'helper_sve_ldnf1bb_r',
|
|
'helper_sve_ldnf1bds_r',
|
|
'helper_sve_ldnf1bdu_r',
|
|
'helper_sve_ldnf1bhs_r',
|
|
'helper_sve_ldnf1bhu_r',
|
|
'helper_sve_ldnf1bss_r',
|
|
'helper_sve_ldnf1bsu_r',
|
|
'helper_sve_ldnf1dd_be_r',
|
|
'helper_sve_ldnf1dd_le_r',
|
|
'helper_sve_ldnf1hh_be_r',
|
|
'helper_sve_ldnf1hh_le_r',
|
|
'helper_sve_ldnf1hds_be_r',
|
|
'helper_sve_ldnf1hds_le_r',
|
|
'helper_sve_ldnf1hdu_be_r',
|
|
'helper_sve_ldnf1hdu_le_r',
|
|
'helper_sve_ldnf1hss_be_r',
|
|
'helper_sve_ldnf1hss_le_r',
|
|
'helper_sve_ldnf1hsu_be_r',
|
|
'helper_sve_ldnf1hsu_le_r',
|
|
'helper_sve_ldnf1ss_be_r',
|
|
'helper_sve_ldnf1ss_le_r',
|
|
'helper_sve_ldnf1sds_be_r',
|
|
'helper_sve_ldnf1sds_le_r',
|
|
'helper_sve_ldnf1sdu_be_r',
|
|
'helper_sve_ldnf1sdu_le_r',
|
|
'helper_sve_ldffbds_zd',
|
|
'helper_sve_ldffbds_zss',
|
|
'helper_sve_ldffbds_zsu',
|
|
'helper_sve_ldffbdu_zd',
|
|
'helper_sve_ldffbdu_zss',
|
|
'helper_sve_ldffbdu_zsu',
|
|
'helper_sve_ldffbss_zss',
|
|
'helper_sve_ldffbss_zsu',
|
|
'helper_sve_ldffbsu_zsu_mte',
|
|
'helper_sve_ldffhsu_le_zsu_mte',
|
|
'helper_sve_ldffhsu_be_zsu_mte',
|
|
'helper_sve_ldffss_le_zsu_mte',
|
|
'helper_sve_ldffss_be_zsu_mte',
|
|
'helper_sve_ldffbss_zsu_mte',
|
|
'helper_sve_ldffhss_le_zsu_mte',
|
|
'helper_sve_ldffhss_be_zsu_mte',
|
|
'helper_sve_ldffbsu_zss_mte',
|
|
'helper_sve_ldffhsu_le_zss_mte',
|
|
'helper_sve_ldffhsu_be_zss_mte',
|
|
'helper_sve_ldffss_le_zss_mte',
|
|
'helper_sve_ldffss_be_zss_mte',
|
|
'helper_sve_ldffbss_zss_mte',
|
|
'helper_sve_ldffhss_le_zss_mte',
|
|
'helper_sve_ldffhss_be_zss_mte',
|
|
'helper_sve_ldffbdu_zsu_mte',
|
|
'helper_sve_ldffhdu_le_zsu_mte',
|
|
'helper_sve_ldffhdu_be_zsu_mte',
|
|
'helper_sve_ldffsdu_le_zsu_mte',
|
|
'helper_sve_ldffsdu_be_zsu_mte',
|
|
'helper_sve_ldffdd_le_zsu_mte',
|
|
'helper_sve_ldffdd_be_zsu_mte',
|
|
'helper_sve_ldffbds_zsu_mte',
|
|
'helper_sve_ldffhds_le_zsu_mte',
|
|
'helper_sve_ldffhds_be_zsu_mte',
|
|
'helper_sve_ldffsds_le_zsu_mte',
|
|
'helper_sve_ldffsds_be_zsu_mte',
|
|
'helper_sve_ldffbdu_zss_mte',
|
|
'helper_sve_ldffhdu_le_zss_mte',
|
|
'helper_sve_ldffhdu_be_zss_mte',
|
|
'helper_sve_ldffsdu_le_zss_mte',
|
|
'helper_sve_ldffsdu_be_zss_mte',
|
|
'helper_sve_ldffdd_le_zss_mte',
|
|
'helper_sve_ldffdd_be_zss_mte',
|
|
'helper_sve_ldffbds_zss_mte',
|
|
'helper_sve_ldffhds_le_zss_mte',
|
|
'helper_sve_ldffhds_be_zss_mte',
|
|
'helper_sve_ldffsds_le_zss_mte',
|
|
'helper_sve_ldffsds_be_zss_mte',
|
|
'helper_sve_ldffbdu_zd_mte',
|
|
'helper_sve_ldffhdu_le_zd_mte',
|
|
'helper_sve_ldffhdu_be_zd_mte',
|
|
'helper_sve_ldffsdu_le_zd_mte',
|
|
'helper_sve_ldffsdu_be_zd_mte',
|
|
'helper_sve_ldffdd_le_zd_mte',
|
|
'helper_sve_ldffdd_be_zd_mte',
|
|
'helper_sve_ldffbds_zd_mte',
|
|
'helper_sve_ldffhds_le_zd_mte',
|
|
'helper_sve_ldffhds_be_zd_mte',
|
|
'helper_sve_ldffsds_le_zd_mte',
|
|
'helper_sve_ldffsds_be_zd_mte',
|
|
'helper_sve_ldffbsu_zss',
|
|
'helper_sve_ldffbsu_zsu',
|
|
'helper_sve_ldffdd_be_zd',
|
|
'helper_sve_ldffdd_le_zd',
|
|
'helper_sve_ldffdd_be_zss',
|
|
'helper_sve_ldffdd_le_zss',
|
|
'helper_sve_ldffdd_be_zsu',
|
|
'helper_sve_ldffdd_le_zsu',
|
|
'helper_sve_ldffhds_be_zd',
|
|
'helper_sve_ldffhds_le_zd',
|
|
'helper_sve_ldffhds_be_zss',
|
|
'helper_sve_ldffhds_le_zss',
|
|
'helper_sve_ldffhds_be_zsu',
|
|
'helper_sve_ldffhds_le_zsu',
|
|
'helper_sve_ldffhdu_be_zd',
|
|
'helper_sve_ldffhdu_le_zd',
|
|
'helper_sve_ldffhdu_be_zss',
|
|
'helper_sve_ldffhdu_le_zss',
|
|
'helper_sve_ldffhdu_be_zsu',
|
|
'helper_sve_ldffhdu_le_zsu',
|
|
'helper_sve_ldffhss_be_zss',
|
|
'helper_sve_ldffhss_le_zss',
|
|
'helper_sve_ldffhss_be_zsu',
|
|
'helper_sve_ldffhss_le_zsu',
|
|
'helper_sve_ldffhsu_be_zss',
|
|
'helper_sve_ldffhsu_le_zss',
|
|
'helper_sve_ldffhsu_be_zsu',
|
|
'helper_sve_ldffhsu_le_zsu',
|
|
'helper_sve_ldffsds_be_zd',
|
|
'helper_sve_ldffsds_le_zd',
|
|
'helper_sve_ldffsds_be_zss',
|
|
'helper_sve_ldffsds_le_zss',
|
|
'helper_sve_ldffsds_be_zsu',
|
|
'helper_sve_ldffsds_le_zsu',
|
|
'helper_sve_ldffsdu_be_zd',
|
|
'helper_sve_ldffsdu_le_zd',
|
|
'helper_sve_ldffsdu_be_zss',
|
|
'helper_sve_ldffsdu_le_zss',
|
|
'helper_sve_ldffsdu_be_zsu',
|
|
'helper_sve_ldffsdu_le_zsu',
|
|
'helper_sve_ldffss_be_zss',
|
|
'helper_sve_ldffss_le_zss',
|
|
'helper_sve_ldffss_be_zsu',
|
|
'helper_sve_ldffss_le_zsu',
|
|
'helper_sve_lsl_zpzi_b',
|
|
'helper_sve_lsl_zpzi_d',
|
|
'helper_sve_lsl_zpzi_h',
|
|
'helper_sve_lsl_zpzi_s',
|
|
'helper_sve_lsl_zpzw_b',
|
|
'helper_sve_lsl_zpzw_h',
|
|
'helper_sve_lsl_zpzw_s',
|
|
'helper_sve_lsl_zpzz_b',
|
|
'helper_sve_lsl_zpzz_d',
|
|
'helper_sve_lsl_zpzz_h',
|
|
'helper_sve_lsl_zpzz_s',
|
|
'helper_sve_lsl_zzw_b',
|
|
'helper_sve_lsl_zzw_h',
|
|
'helper_sve_lsl_zzw_s',
|
|
'helper_sve_lsr_zpzi_b',
|
|
'helper_sve_lsr_zpzi_d',
|
|
'helper_sve_lsr_zpzi_h',
|
|
'helper_sve_lsr_zpzi_s',
|
|
'helper_sve_lsr_zpzw_b',
|
|
'helper_sve_lsr_zpzw_h',
|
|
'helper_sve_lsr_zpzw_s',
|
|
'helper_sve_lsr_zpzz_b',
|
|
'helper_sve_lsr_zpzz_d',
|
|
'helper_sve_lsr_zpzz_h',
|
|
'helper_sve_lsr_zpzz_s',
|
|
'helper_sve_lsr_zzw_b',
|
|
'helper_sve_lsr_zzw_h',
|
|
'helper_sve_lsr_zzw_s',
|
|
'helper_sve_mla_b',
|
|
'helper_sve_mla_d',
|
|
'helper_sve_mla_h',
|
|
'helper_sve_mla_s',
|
|
'helper_sve_mls_b',
|
|
'helper_sve_mls_d',
|
|
'helper_sve_mls_h',
|
|
'helper_sve_mls_s',
|
|
'helper_sve_movz_b',
|
|
'helper_sve_movz_d',
|
|
'helper_sve_movz_h',
|
|
'helper_sve_movz_s',
|
|
'helper_sve_mul_zpzz_b',
|
|
'helper_sve_mul_zpzz_d',
|
|
'helper_sve_mul_zpzz_h',
|
|
'helper_sve_mul_zpzz_s',
|
|
'helper_sve_nand_pppp',
|
|
'helper_sve_neg_b',
|
|
'helper_sve_neg_d',
|
|
'helper_sve_neg_h',
|
|
'helper_sve_neg_s',
|
|
'helper_sve_nor_pppp',
|
|
'helper_sve_not_zpz_b',
|
|
'helper_sve_not_zpz_d',
|
|
'helper_sve_not_zpz_h',
|
|
'helper_sve_not_zpz_s',
|
|
'helper_sve_orn_pppp',
|
|
'helper_sve_orr_pppp',
|
|
'helper_sve_orr_zpzz_b',
|
|
'helper_sve_orr_zpzz_d',
|
|
'helper_sve_orr_zpzz_h',
|
|
'helper_sve_orr_zpzz_s',
|
|
'helper_sve_orv_b',
|
|
'helper_sve_orv_d',
|
|
'helper_sve_orv_h',
|
|
'helper_sve_orv_s',
|
|
'helper_sve_pfirst',
|
|
'helper_sve_pnext',
|
|
'helper_sve_predtest',
|
|
'helper_sve_predtest1',
|
|
'helper_sve_punpk_p',
|
|
'helper_sve_rbit_b',
|
|
'helper_sve_rbit_d',
|
|
'helper_sve_rbit_h',
|
|
'helper_sve_rbit_s',
|
|
'helper_sve_rev_b',
|
|
'helper_sve_rev_d',
|
|
'helper_sve_rev_h',
|
|
'helper_sve_rev_p',
|
|
'helper_sve_rev_s',
|
|
'helper_sve_revb_h',
|
|
'helper_sve_revb_d',
|
|
'helper_sve_revb_s',
|
|
'helper_sve_revh_d',
|
|
'helper_sve_revh_s',
|
|
'helper_sve_revw_d',
|
|
'helper_sve_sabd_zpzz_b',
|
|
'helper_sve_sabd_zpzz_d',
|
|
'helper_sve_sabd_zpzz_h',
|
|
'helper_sve_sabd_zpzz_s',
|
|
'helper_sve_saddv_b',
|
|
'helper_sve_saddv_h',
|
|
'helper_sve_saddv_s',
|
|
'helper_sve_scvt_dd',
|
|
'helper_sve_scvt_dh',
|
|
'helper_sve_scvt_ds',
|
|
'helper_sve_scvt_hh',
|
|
'helper_sve_scvt_sh',
|
|
'helper_sve_scvt_sd',
|
|
'helper_sve_scvt_ss',
|
|
'helper_sve_sdiv_zpzz_d',
|
|
'helper_sve_sdiv_zpzz_s',
|
|
'helper_sve_sel_pppp',
|
|
'helper_sve_sel_zpzz_b',
|
|
'helper_sve_sel_zpzz_d',
|
|
'helper_sve_sel_zpzz_h',
|
|
'helper_sve_sel_zpzz_s',
|
|
'helper_sve_smax_zpzz_b',
|
|
'helper_sve_smax_zpzz_d',
|
|
'helper_sve_smax_zpzz_h',
|
|
'helper_sve_smax_zpzz_s',
|
|
'helper_sve_smaxi_b',
|
|
'helper_sve_smaxi_d',
|
|
'helper_sve_smaxi_h',
|
|
'helper_sve_smaxi_s',
|
|
'helper_sve_smaxv_b',
|
|
'helper_sve_smaxv_d',
|
|
'helper_sve_smaxv_h',
|
|
'helper_sve_smaxv_s',
|
|
'helper_sve_smin_zpzz_b',
|
|
'helper_sve_smin_zpzz_d',
|
|
'helper_sve_smin_zpzz_h',
|
|
'helper_sve_smin_zpzz_s',
|
|
'helper_sve_smini_b',
|
|
'helper_sve_smini_d',
|
|
'helper_sve_smini_h',
|
|
'helper_sve_smini_s',
|
|
'helper_sve_sminv_b',
|
|
'helper_sve_sminv_d',
|
|
'helper_sve_sminv_h',
|
|
'helper_sve_sminv_s',
|
|
'helper_sve_smulh_zpzz_b',
|
|
'helper_sve_smulh_zpzz_d',
|
|
'helper_sve_smulh_zpzz_h',
|
|
'helper_sve_smulh_zpzz_s',
|
|
'helper_sve_splice',
|
|
'helper_sve_sqaddi_b',
|
|
'helper_sve_sqaddi_d',
|
|
'helper_sve_sqaddi_h',
|
|
'helper_sve_sqaddi_s',
|
|
'helper_sve_st1bb_r',
|
|
'helper_sve_st2bb_r',
|
|
'helper_sve_st3bb_r',
|
|
'helper_sve_st4bb_r',
|
|
'helper_sve_st1bd_r',
|
|
'helper_sve_st1bh_r',
|
|
'helper_sve_st1bs_r',
|
|
'helper_sve_st1bb_r_mte',
|
|
'helper_sve_st2bb_r_mte',
|
|
'helper_sve_st3bb_r_mte',
|
|
'helper_sve_st4bb_r_mte',
|
|
'helper_sve_st1hh_le_r_mte',
|
|
'helper_sve_st2hh_le_r_mte',
|
|
'helper_sve_st3hh_le_r_mte',
|
|
'helper_sve_st4hh_le_r_mte',
|
|
'helper_sve_st1hh_be_r_mte',
|
|
'helper_sve_st2hh_be_r_mte',
|
|
'helper_sve_st3hh_be_r_mte',
|
|
'helper_sve_st4hh_be_r_mte',
|
|
'helper_sve_st1ss_le_r_mte',
|
|
'helper_sve_st2ss_le_r_mte',
|
|
'helper_sve_st3ss_le_r_mte',
|
|
'helper_sve_st4ss_le_r_mte',
|
|
'helper_sve_st1ss_be_r_mte',
|
|
'helper_sve_st2ss_be_r_mte',
|
|
'helper_sve_st3ss_be_r_mte',
|
|
'helper_sve_st4ss_be_r_mte',
|
|
'helper_sve_st1dd_le_r_mte',
|
|
'helper_sve_st2dd_le_r_mte',
|
|
'helper_sve_st3dd_le_r_mte',
|
|
'helper_sve_st4dd_le_r_mte',
|
|
'helper_sve_st1dd_be_r_mte',
|
|
'helper_sve_st2dd_be_r_mte',
|
|
'helper_sve_st3dd_be_r_mte',
|
|
'helper_sve_st4dd_be_r_mte',
|
|
'helper_sve_st1bh_r_mte',
|
|
'helper_sve_st1bs_r_mte',
|
|
'helper_sve_st1bd_r_mte',
|
|
'helper_sve_st1hs_le_r_mte',
|
|
'helper_sve_st1hd_le_r_mte',
|
|
'helper_sve_st1hs_be_r_mte',
|
|
'helper_sve_st1hd_be_r_mte',
|
|
'helper_sve_st1sd_le_r_mte',
|
|
'helper_sve_st1sd_be_r_mte',
|
|
'helper_sve_st1dd_be_r',
|
|
'helper_sve_st1dd_le_r',
|
|
'helper_sve_st2dd_be_r',
|
|
'helper_sve_st2dd_le_r',
|
|
'helper_sve_st3dd_be_r',
|
|
'helper_sve_st3dd_le_r',
|
|
'helper_sve_st4dd_be_r',
|
|
'helper_sve_st4dd_le_r',
|
|
'helper_sve_st1hh_be_r',
|
|
'helper_sve_st1hh_le_r',
|
|
'helper_sve_st2hh_be_r',
|
|
'helper_sve_st2hh_le_r',
|
|
'helper_sve_st3hh_be_r',
|
|
'helper_sve_st3hh_le_r',
|
|
'helper_sve_st4hh_be_r',
|
|
'helper_sve_st4hh_le_r',
|
|
'helper_sve_st1hd_be_r',
|
|
'helper_sve_st1hd_le_r',
|
|
'helper_sve_st1hs_be_r',
|
|
'helper_sve_st1hs_le_r',
|
|
'helper_sve_st1sd_be_r',
|
|
'helper_sve_st1sd_le_r',
|
|
'helper_sve_st1ss_be_r',
|
|
'helper_sve_st1ss_le_r',
|
|
'helper_sve_st2ss_be_r',
|
|
'helper_sve_st2ss_le_r',
|
|
'helper_sve_st3ss_be_r',
|
|
'helper_sve_st3ss_le_r',
|
|
'helper_sve_st4ss_be_r',
|
|
'helper_sve_st4ss_le_r',
|
|
'helper_sve_stbd_zd',
|
|
'helper_sve_stbd_zss',
|
|
'helper_sve_stbd_zsu',
|
|
'helper_sve_stbs_zsu_mte',
|
|
'helper_sve_sths_le_zsu_mte',
|
|
'helper_sve_sths_be_zsu_mte',
|
|
'helper_sve_stss_le_zsu_mte',
|
|
'helper_sve_stss_be_zsu_mte',
|
|
'helper_sve_stbs_zss_mte',
|
|
'helper_sve_sths_le_zss_mte',
|
|
'helper_sve_sths_be_zss_mte',
|
|
'helper_sve_stss_le_zss_mte',
|
|
'helper_sve_stss_be_zss_mte',
|
|
'helper_sve_stbd_zsu_mte',
|
|
'helper_sve_sthd_le_zsu_mte',
|
|
'helper_sve_sthd_be_zsu_mte',
|
|
'helper_sve_stsd_le_zsu_mte',
|
|
'helper_sve_stsd_be_zsu_mte',
|
|
'helper_sve_stdd_le_zsu_mte',
|
|
'helper_sve_stdd_be_zsu_mte',
|
|
'helper_sve_stbd_zss_mte',
|
|
'helper_sve_sthd_le_zss_mte',
|
|
'helper_sve_sthd_be_zss_mte',
|
|
'helper_sve_stsd_le_zss_mte',
|
|
'helper_sve_stsd_be_zss_mte',
|
|
'helper_sve_stdd_le_zss_mte',
|
|
'helper_sve_stdd_be_zss_mte',
|
|
'helper_sve_stbd_zd_mte',
|
|
'helper_sve_sthd_le_zd_mte',
|
|
'helper_sve_sthd_be_zd_mte',
|
|
'helper_sve_stsd_le_zd_mte',
|
|
'helper_sve_stsd_be_zd_mte',
|
|
'helper_sve_stdd_le_zd_mte',
|
|
'helper_sve_stdd_be_zd_mte',
|
|
'helper_sve_stbs_zss',
|
|
'helper_sve_stbs_zsu',
|
|
'helper_sve_stdd_be_zd',
|
|
'helper_sve_stdd_le_zd',
|
|
'helper_sve_stdd_be_zss',
|
|
'helper_sve_stdd_le_zss',
|
|
'helper_sve_stdd_be_zsu',
|
|
'helper_sve_stdd_le_zsu',
|
|
'helper_sve_sthd_be_zd',
|
|
'helper_sve_sthd_le_zd',
|
|
'helper_sve_sthd_be_zss',
|
|
'helper_sve_sthd_le_zss',
|
|
'helper_sve_sthd_be_zsu',
|
|
'helper_sve_sthd_le_zsu',
|
|
'helper_sve_sths_be_zss',
|
|
'helper_sve_sths_le_zss',
|
|
'helper_sve_sths_be_zsu',
|
|
'helper_sve_sths_le_zsu',
|
|
'helper_sve_stsd_be_zd',
|
|
'helper_sve_stsd_le_zd',
|
|
'helper_sve_stsd_be_zss',
|
|
'helper_sve_stsd_le_zss',
|
|
'helper_sve_stsd_be_zsu',
|
|
'helper_sve_stsd_le_zsu',
|
|
'helper_sve_stss_be_zss',
|
|
'helper_sve_stss_le_zss',
|
|
'helper_sve_stss_be_zsu',
|
|
'helper_sve_stss_le_zsu',
|
|
'helper_sve_sub_zpzz_b',
|
|
'helper_sve_sub_zpzz_d',
|
|
'helper_sve_sub_zpzz_h',
|
|
'helper_sve_sub_zpzz_s',
|
|
'helper_sve_subri_b',
|
|
'helper_sve_subri_d',
|
|
'helper_sve_subri_h',
|
|
'helper_sve_subri_s',
|
|
'helper_sve_sunpk_d',
|
|
'helper_sve_sunpk_h',
|
|
'helper_sve_sunpk_s',
|
|
'helper_sve_sxtb_d',
|
|
'helper_sve_sxtb_h',
|
|
'helper_sve_sxtb_s',
|
|
'helper_sve_sxth_d',
|
|
'helper_sve_sxth_s',
|
|
'helper_sve_sxtw_d',
|
|
'helper_sve_tbl_b',
|
|
'helper_sve_tbl_d',
|
|
'helper_sve_tbl_h',
|
|
'helper_sve_tbl_s',
|
|
'helper_sve_trn_b',
|
|
'helper_sve_trn_d',
|
|
'helper_sve_trn_h',
|
|
'helper_sve_trn_s',
|
|
'helper_sve_trn_p',
|
|
'helper_sve_uabd_zpzz_b',
|
|
'helper_sve_uabd_zpzz_d',
|
|
'helper_sve_uabd_zpzz_h',
|
|
'helper_sve_uabd_zpzz_s',
|
|
'helper_sve_uaddv_b',
|
|
'helper_sve_uaddv_d',
|
|
'helper_sve_uaddv_h',
|
|
'helper_sve_uaddv_s',
|
|
'helper_sve_ucvt_dd',
|
|
'helper_sve_ucvt_dh',
|
|
'helper_sve_ucvt_ds',
|
|
'helper_sve_ucvt_hh',
|
|
'helper_sve_ucvt_sh',
|
|
'helper_sve_ucvt_sd',
|
|
'helper_sve_ucvt_ss',
|
|
'helper_sve_udiv_zpzz_d',
|
|
'helper_sve_udiv_zpzz_s',
|
|
'helper_sve_umax_zpzz_b',
|
|
'helper_sve_umax_zpzz_d',
|
|
'helper_sve_umax_zpzz_h',
|
|
'helper_sve_umax_zpzz_s',
|
|
'helper_sve_umaxi_b',
|
|
'helper_sve_umaxi_d',
|
|
'helper_sve_umaxi_h',
|
|
'helper_sve_umaxi_s',
|
|
'helper_sve_umaxv_b',
|
|
'helper_sve_umaxv_d',
|
|
'helper_sve_umaxv_h',
|
|
'helper_sve_umaxv_s',
|
|
'helper_sve_umin_zpzz_b',
|
|
'helper_sve_umin_zpzz_d',
|
|
'helper_sve_umin_zpzz_h',
|
|
'helper_sve_umin_zpzz_s',
|
|
'helper_sve_umini_b',
|
|
'helper_sve_umini_d',
|
|
'helper_sve_umini_h',
|
|
'helper_sve_umini_s',
|
|
'helper_sve_uminv_b',
|
|
'helper_sve_uminv_d',
|
|
'helper_sve_uminv_h',
|
|
'helper_sve_uminv_s',
|
|
'helper_sve_umulh_zpzz_b',
|
|
'helper_sve_umulh_zpzz_d',
|
|
'helper_sve_umulh_zpzz_h',
|
|
'helper_sve_umulh_zpzz_s',
|
|
'helper_sve_uqaddi_b',
|
|
'helper_sve_uqaddi_d',
|
|
'helper_sve_uqaddi_h',
|
|
'helper_sve_uqaddi_s',
|
|
'helper_sve_uqsubi_d',
|
|
'helper_sve_uunpk_d',
|
|
'helper_sve_uunpk_h',
|
|
'helper_sve_uunpk_s',
|
|
'helper_sve_uxtb_d',
|
|
'helper_sve_uxtb_h',
|
|
'helper_sve_uxtb_s',
|
|
'helper_sve_uxth_d',
|
|
'helper_sve_uxth_s',
|
|
'helper_sve_uxtw_d',
|
|
'helper_sve_uzp_b',
|
|
'helper_sve_uzp_d',
|
|
'helper_sve_uzp_h',
|
|
'helper_sve_uzp_s',
|
|
'helper_sve_uzp_p',
|
|
'helper_sve_while',
|
|
'helper_sve_zip_b',
|
|
'helper_sve_zip_d',
|
|
'helper_sve_zip_h',
|
|
'helper_sve_zip_s',
|
|
'helper_sve_zip_p',
|
|
'helper_sve2_pmull_h',
|
|
'helper_udiv64',
|
|
'helper_vfp_cmpd_a64',
|
|
'helper_vfp_cmped_a64',
|
|
'helper_vfp_cmpes_a64',
|
|
'helper_vfp_cmps_a64',
|
|
'helper_vfp_mulxd',
|
|
'helper_vfp_mulxs',
|
|
'helper_vjcvt',
|
|
'helper_xpacd',
|
|
'helper_xpaci',
|
|
'logic_imm_decode_wmask',
|
|
'mte_check1_',
|
|
'mte_checkN_',
|
|
'mte_probe1',
|
|
'new_tmp_a64',
|
|
'new_tmp_a64_local',
|
|
'new_tmp_a64_zero',
|
|
'pmsav8_mpu_lookup',
|
|
'pmu_op_start',
|
|
'pmu_op_finish',
|
|
'pmu_pre_el_change',
|
|
'pmu_post_el_change',
|
|
'pred_esz_masks',
|
|
'raise_exception',
|
|
'raise_exception_ra',
|
|
'read_cpu_reg',
|
|
'read_cpu_reg_sp',
|
|
'sve_access_check',
|
|
'sve_exception_el',
|
|
'sve_zcr_len_for_el',
|
|
'unallocated_encoding',
|
|
'v8m_security_lookup',
|
|
'vfp_expand_imm',
|
|
'write_fp_dreg',
|
|
)
|
|
|
|
m68k_symbols = (
|
|
'cpu_mmu_index',
|
|
'gen_helper_raise_exception',
|
|
'raise_exception',
|
|
)
|
|
|
|
mips_symbols = (
|
|
'MIPS64_REGS_STORAGE_SIZE',
|
|
'MIPS_REGS_STORAGE_SIZE',
|
|
'cpu_mips_get_count',
|
|
'cpu_mips_get_random',
|
|
'cpu_mips_kseg0_to_phys',
|
|
'cpu_mips_kvm_um_phys_to_kseg0',
|
|
'cpu_mips_phys_to_kseg0',
|
|
'cpu_mips_realize_env',
|
|
'cpu_mips_start_count',
|
|
'cpu_mips_stop_count',
|
|
'cpu_mips_store_cause',
|
|
'cpu_mips_store_compare',
|
|
'cpu_mips_store_count',
|
|
'cpu_mips_store_status',
|
|
'cpu_mips_tlb_flush',
|
|
'cpu_mips_translate_address',
|
|
'cpu_mmu_index',
|
|
'cpu_rddsp',
|
|
'cpu_set_exception_base',
|
|
'cpu_state_reset',
|
|
'cpu_supports_isa',
|
|
'cpu_supports_cps_smp',
|
|
'cpu_wrdsp',
|
|
'do_raise_exception_err',
|
|
'exception_resume_pc',
|
|
'fixed_mmu_map_address',
|
|
'float_class_d',
|
|
'float_class_s',
|
|
'gen_helper_float_class_d',
|
|
'gen_helper_float_class_s',
|
|
'helper_absq_s_ob',
|
|
'helper_absq_s_ph',
|
|
'helper_absq_s_pw',
|
|
'helper_absq_s_qb',
|
|
'helper_absq_s_qh',
|
|
'helper_absq_s_w',
|
|
'helper_addq_ph',
|
|
'helper_addq_pw',
|
|
'helper_addq_qh',
|
|
'helper_addq_s_ph',
|
|
'helper_addq_s_pw',
|
|
'helper_addq_s_qh',
|
|
'helper_addq_s_w',
|
|
'helper_addqh_ph',
|
|
'helper_addqh_r_ph',
|
|
'helper_addqh_r_w',
|
|
'helper_addqh_w',
|
|
'helper_addsc',
|
|
'helper_addu_ob',
|
|
'helper_addu_ph',
|
|
'helper_addu_qb',
|
|
'helper_addu_qh',
|
|
'helper_addu_s_ob',
|
|
'helper_addu_s_ph',
|
|
'helper_addu_s_qb',
|
|
'helper_addu_s_qh',
|
|
'helper_adduh_ob',
|
|
'helper_adduh_qb',
|
|
'helper_adduh_r_ob',
|
|
'helper_adduh_r_qb',
|
|
'helper_addwc',
|
|
'helper_biadd',
|
|
'helper_bitrev',
|
|
'helper_bitswap',
|
|
'helper_cache',
|
|
'helper_cfc1',
|
|
'helper_cmp_d_eq',
|
|
'helper_cmp_d_f',
|
|
'helper_cmp_d_le',
|
|
'helper_cmp_d_lt',
|
|
'helper_cmp_d_nge',
|
|
'helper_cmp_d_ngl',
|
|
'helper_cmp_d_ngle',
|
|
'helper_cmp_d_ngt',
|
|
'helper_cmp_d_ole',
|
|
'helper_cmp_d_olt',
|
|
'helper_cmp_d_seq',
|
|
'helper_cmp_d_sf',
|
|
'helper_cmp_d_ueq',
|
|
'helper_cmp_d_ule',
|
|
'helper_cmp_d_ult',
|
|
'helper_cmp_d_un',
|
|
'helper_cmp_eq_ph',
|
|
'helper_cmp_eq_pw',
|
|
'helper_cmp_eq_qh',
|
|
'helper_cmp_le_ph',
|
|
'helper_cmp_le_pw',
|
|
'helper_cmp_le_qh',
|
|
'helper_cmp_lt_ph',
|
|
'helper_cmp_lt_pw',
|
|
'helper_cmp_lt_qh',
|
|
'helper_cmp_ps_eq',
|
|
'helper_cmp_ps_f',
|
|
'helper_cmp_ps_le',
|
|
'helper_cmp_ps_lt',
|
|
'helper_cmp_ps_nge',
|
|
'helper_cmp_ps_ngl',
|
|
'helper_cmp_ps_ngle',
|
|
'helper_cmp_ps_ngt',
|
|
'helper_cmp_ps_ole',
|
|
'helper_cmp_ps_olt',
|
|
'helper_cmp_ps_seq',
|
|
'helper_cmp_ps_sf',
|
|
'helper_cmp_ps_ueq',
|
|
'helper_cmp_ps_ule',
|
|
'helper_cmp_ps_ult',
|
|
'helper_cmp_ps_un',
|
|
'helper_cmp_s_eq',
|
|
'helper_cmp_s_f',
|
|
'helper_cmp_s_le',
|
|
'helper_cmp_s_lt',
|
|
'helper_cmp_s_nge',
|
|
'helper_cmp_s_ngl',
|
|
'helper_cmp_s_ngle',
|
|
'helper_cmp_s_ngt',
|
|
'helper_cmp_s_ole',
|
|
'helper_cmp_s_olt',
|
|
'helper_cmp_s_seq',
|
|
'helper_cmp_s_sf',
|
|
'helper_cmp_s_ueq',
|
|
'helper_cmp_s_ule',
|
|
'helper_cmp_s_ult',
|
|
'helper_cmp_s_un',
|
|
'helper_cmpabs_d_eq',
|
|
'helper_cmpabs_d_f',
|
|
'helper_cmpabs_d_le',
|
|
'helper_cmpabs_d_lt',
|
|
'helper_cmpabs_d_nge',
|
|
'helper_cmpabs_d_ngl',
|
|
'helper_cmpabs_d_ngle',
|
|
'helper_cmpabs_d_ngt',
|
|
'helper_cmpabs_d_ole',
|
|
'helper_cmpabs_d_olt',
|
|
'helper_cmpabs_d_seq',
|
|
'helper_cmpabs_d_sf',
|
|
'helper_cmpabs_d_ueq',
|
|
'helper_cmpabs_d_ule',
|
|
'helper_cmpabs_d_ult',
|
|
'helper_cmpabs_d_un',
|
|
'helper_cmpabs_ps_eq',
|
|
'helper_cmpabs_ps_f',
|
|
'helper_cmpabs_ps_le',
|
|
'helper_cmpabs_ps_lt',
|
|
'helper_cmpabs_ps_nge',
|
|
'helper_cmpabs_ps_ngl',
|
|
'helper_cmpabs_ps_ngle',
|
|
'helper_cmpabs_ps_ngt',
|
|
'helper_cmpabs_ps_ole',
|
|
'helper_cmpabs_ps_olt',
|
|
'helper_cmpabs_ps_seq',
|
|
'helper_cmpabs_ps_sf',
|
|
'helper_cmpabs_ps_ueq',
|
|
'helper_cmpabs_ps_ule',
|
|
'helper_cmpabs_ps_ult',
|
|
'helper_cmpabs_ps_un',
|
|
'helper_cmpabs_s_eq',
|
|
'helper_cmpabs_s_f',
|
|
'helper_cmpabs_s_le',
|
|
'helper_cmpabs_s_lt',
|
|
'helper_cmpabs_s_nge',
|
|
'helper_cmpabs_s_ngl',
|
|
'helper_cmpabs_s_ngle',
|
|
'helper_cmpabs_s_ngt',
|
|
'helper_cmpabs_s_ole',
|
|
'helper_cmpabs_s_olt',
|
|
'helper_cmpabs_s_seq',
|
|
'helper_cmpabs_s_sf',
|
|
'helper_cmpabs_s_ueq',
|
|
'helper_cmpabs_s_ule',
|
|
'helper_cmpabs_s_ult',
|
|
'helper_cmpabs_s_un',
|
|
'helper_cmpgdu_eq_ob',
|
|
'helper_cmpgdu_le_ob',
|
|
'helper_cmpgdu_lt_ob',
|
|
'helper_cmpgu_eq_ob',
|
|
'helper_cmpgu_eq_qb',
|
|
'helper_cmpgu_le_ob',
|
|
'helper_cmpgu_le_qb',
|
|
'helper_cmpgu_lt_ob',
|
|
'helper_cmpgu_lt_qb',
|
|
'helper_cmpu_eq_ob',
|
|
'helper_cmpu_eq_qb',
|
|
'helper_cmpu_le_ob',
|
|
'helper_cmpu_le_qb',
|
|
'helper_cmpu_lt_ob',
|
|
'helper_cmpu_lt_qb',
|
|
'helper_ctc1',
|
|
'helper_dbitswap',
|
|
'helper_deret',
|
|
'helper_dextp',
|
|
'helper_dextpdp',
|
|
'helper_dextr_l',
|
|
'helper_dextr_r_l',
|
|
'helper_dextr_r_w',
|
|
'helper_dextr_rs_l',
|
|
'helper_dextr_rs_w',
|
|
'helper_dextr_s_h',
|
|
'helper_dextr_w',
|
|
'helper_di',
|
|
'helper_dinsv',
|
|
'helper_dmadd',
|
|
'helper_dmaddu',
|
|
'helper_dmfc0_lladdr',
|
|
'helper_dmfc0_maar',
|
|
'helper_dmfc0_saar',
|
|
'helper_dmfc0_tccontext',
|
|
'helper_dmfc0_tchalt',
|
|
'helper_dmfc0_tcrestart',
|
|
'helper_dmfc0_tcschedule',
|
|
'helper_dmfc0_tcschefback',
|
|
'helper_dmfc0_watchhi',
|
|
'helper_dmfc0_watchlo',
|
|
'helper_dmsub',
|
|
'helper_dmsubu',
|
|
'helper_dmt',
|
|
'helper_dmtc0_entrylo0',
|
|
'helper_dmtc0_entrylo1',
|
|
'helper_dmthlip',
|
|
'helper_dpa_w_ph',
|
|
'helper_dpa_w_qh',
|
|
'helper_dpaq_s_w_ph',
|
|
'helper_dpaq_s_w_qh',
|
|
'helper_dpaq_sa_l_pw',
|
|
'helper_dpaq_sa_l_w',
|
|
'helper_dpaqx_s_w_ph',
|
|
'helper_dpaqx_sa_w_ph',
|
|
'helper_dpau_h_obl',
|
|
'helper_dpau_h_obr',
|
|
'helper_dpau_h_qbl',
|
|
'helper_dpau_h_qbr',
|
|
'helper_dpax_w_ph',
|
|
'helper_dps_w_ph',
|
|
'helper_dps_w_qh',
|
|
'helper_dpsq_s_w_ph',
|
|
'helper_dpsq_s_w_qh',
|
|
'helper_dpsq_sa_l_pw',
|
|
'helper_dpsq_sa_l_w',
|
|
'helper_dpsqx_s_w_ph',
|
|
'helper_dpsqx_sa_w_ph',
|
|
'helper_dpsu_h_obl',
|
|
'helper_dpsu_h_obr',
|
|
'helper_dpsu_h_qbl',
|
|
'helper_dpsu_h_qbr',
|
|
'helper_dpsx_w_ph',
|
|
'helper_dshilo',
|
|
'helper_dvp',
|
|
'helper_dvpe',
|
|
'helper_ei',
|
|
'helper_emt',
|
|
'helper_eret',
|
|
'helper_eretnc',
|
|
'helper_evp',
|
|
'helper_evpe',
|
|
'helper_extp',
|
|
'helper_extpdp',
|
|
'helper_extr_r_w',
|
|
'helper_extr_rs_w',
|
|
'helper_extr_s_h',
|
|
'helper_extr_w',
|
|
'helper_float_abs_d',
|
|
'helper_float_abs_ps',
|
|
'helper_float_abs_s',
|
|
'helper_float_add_d',
|
|
'helper_float_add_ps',
|
|
'helper_float_add_s',
|
|
'helper_float_addr_ps',
|
|
'helper_float_ceil_2008_l_d',
|
|
'helper_float_ceil_2008_l_s',
|
|
'helper_float_ceil_2008_w_d',
|
|
'helper_float_ceil_2008_w_s',
|
|
'helper_float_ceil_l_d',
|
|
'helper_float_ceil_l_s',
|
|
'helper_float_ceil_w_d',
|
|
'helper_float_ceil_w_s',
|
|
'helper_float_chs_d',
|
|
'helper_float_chs_ps',
|
|
'helper_float_chs_s',
|
|
'helper_float_class_d',
|
|
'helper_float_class_s',
|
|
'helper_float_cvt_2008_l_d',
|
|
'helper_float_cvt_2008_l_s',
|
|
'helper_float_cvt_2008_w_d',
|
|
'helper_float_cvt_2008_w_s',
|
|
'helper_float_cvt_l_d',
|
|
'helper_float_cvt_l_s',
|
|
'helper_float_cvt_w_d',
|
|
'helper_float_cvt_w_s',
|
|
'helper_float_cvtd_l',
|
|
'helper_float_cvtd_s',
|
|
'helper_float_cvtd_w',
|
|
'helper_float_cvtps_pw',
|
|
'helper_float_cvtpw_ps',
|
|
'helper_float_cvts_d',
|
|
'helper_float_cvts_l',
|
|
'helper_float_cvts_pl',
|
|
'helper_float_cvts_pu',
|
|
'helper_float_cvts_w',
|
|
'helper_float_div_d',
|
|
'helper_float_div_ps',
|
|
'helper_float_div_s',
|
|
'helper_float_floor_2008_l_d',
|
|
'helper_float_floor_2008_l_s',
|
|
'helper_float_floor_2008_w_d',
|
|
'helper_float_floor_2008_w_s',
|
|
'helper_float_floor_l_d',
|
|
'helper_float_floor_l_s',
|
|
'helper_float_floor_w_d',
|
|
'helper_float_floor_w_s',
|
|
'helper_float_madd_d',
|
|
'helper_float_madd_ps',
|
|
'helper_float_madd_s',
|
|
'helper_float_maddf_d',
|
|
'helper_float_maddf_s',
|
|
'helper_float_max_d',
|
|
'helper_float_max_s',
|
|
'helper_float_maxa_d',
|
|
'helper_float_maxa_s',
|
|
'helper_float_min_d',
|
|
'helper_float_min_s',
|
|
'helper_float_mina_d',
|
|
'helper_float_mina_s',
|
|
'helper_float_msub_d',
|
|
'helper_float_msub_ps',
|
|
'helper_float_msub_s',
|
|
'helper_float_msubf_d',
|
|
'helper_float_msubf_s',
|
|
'helper_float_mul_d',
|
|
'helper_float_mul_ps',
|
|
'helper_float_mul_s',
|
|
'helper_float_mulr_ps',
|
|
'helper_float_nmadd_d',
|
|
'helper_float_nmadd_ps',
|
|
'helper_float_nmadd_s',
|
|
'helper_float_nmsub_d',
|
|
'helper_float_nmsub_ps',
|
|
'helper_float_nmsub_s',
|
|
'helper_float_recip1_d',
|
|
'helper_float_recip1_ps',
|
|
'helper_float_recip1_s',
|
|
'helper_float_recip2_d',
|
|
'helper_float_recip2_ps',
|
|
'helper_float_recip2_s',
|
|
'helper_float_recip_d',
|
|
'helper_float_recip_s',
|
|
'helper_float_rint_d',
|
|
'helper_float_rint_s',
|
|
'helper_float_round_2008_l_d',
|
|
'helper_float_round_2008_l_s',
|
|
'helper_float_round_2008_w_d',
|
|
'helper_float_round_2008_w_s',
|
|
'helper_float_round_l_d',
|
|
'helper_float_round_l_s',
|
|
'helper_float_round_w_d',
|
|
'helper_float_round_w_s',
|
|
'helper_float_rsqrt1_d',
|
|
'helper_float_rsqrt1_ps',
|
|
'helper_float_rsqrt1_s',
|
|
'helper_float_rsqrt2_d',
|
|
'helper_float_rsqrt2_ps',
|
|
'helper_float_rsqrt2_s',
|
|
'helper_float_rsqrt_d',
|
|
'helper_float_rsqrt_s',
|
|
'helper_float_sqrt_d',
|
|
'helper_float_sqrt_s',
|
|
'helper_float_sub_d',
|
|
'helper_float_sub_ps',
|
|
'helper_float_sub_s',
|
|
'helper_float_trunc_2008_l_d',
|
|
'helper_float_trunc_2008_l_s',
|
|
'helper_float_trunc_2008_w_d',
|
|
'helper_float_trunc_2008_w_s',
|
|
'helper_float_trunc_l_d',
|
|
'helper_float_trunc_l_s',
|
|
'helper_float_trunc_w_d',
|
|
'helper_float_trunc_w_s',
|
|
'helper_fork',
|
|
'helper_ginvt',
|
|
'helper_insv',
|
|
'helper_ldm',
|
|
'helper_ll',
|
|
'helper_lld',
|
|
'helper_lwm',
|
|
'helper_macc',
|
|
'helper_macchi',
|
|
'helper_macchiu',
|
|
'helper_maccu',
|
|
'helper_maq_s_l_pwl',
|
|
'helper_maq_s_l_pwr',
|
|
'helper_maq_s_w_phl',
|
|
'helper_maq_s_w_phr',
|
|
'helper_maq_s_w_qhll',
|
|
'helper_maq_s_w_qhlr',
|
|
'helper_maq_s_w_qhrl',
|
|
'helper_maq_s_w_qhrr',
|
|
'helper_maq_sa_w_phl',
|
|
'helper_maq_sa_w_phr',
|
|
'helper_maq_sa_w_qhll',
|
|
'helper_maq_sa_w_qhlr',
|
|
'helper_maq_sa_w_qhrl',
|
|
'helper_maq_sa_w_qhrr',
|
|
'helper_mfc0_count',
|
|
'helper_mfc0_debug',
|
|
'helper_mfc0_lladdr',
|
|
'helper_mfc0_maar',
|
|
'helper_mfc0_mvpconf0',
|
|
'helper_mfc0_mvpconf1',
|
|
'helper_mfc0_mvpcontrol',
|
|
'helper_mfc0_random',
|
|
'helper_mfc0_saar',
|
|
'helper_mfc0_tcbind',
|
|
'helper_mfc0_tccontext',
|
|
'helper_mfc0_tchalt',
|
|
'helper_mfc0_tcrestart',
|
|
'helper_mfc0_tcschedule',
|
|
'helper_mfc0_tcschefback',
|
|
'helper_mfc0_tcstatus',
|
|
'helper_mfc0_watchhi',
|
|
'helper_mfc0_watchlo',
|
|
'helper_mfhc0_maar',
|
|
'helper_mfhc0_saar',
|
|
'helper_mfhc0_watchhi',
|
|
'helper_mftacx',
|
|
'helper_mftc0_cause',
|
|
'helper_mftc0_configx',
|
|
'helper_mftc0_debug',
|
|
'helper_mftc0_ebase',
|
|
'helper_mftc0_entryhi',
|
|
'helper_mftc0_epc',
|
|
'helper_mftc0_status',
|
|
'helper_mftc0_tcbind',
|
|
'helper_mftc0_tccontext',
|
|
'helper_mftc0_tchalt',
|
|
'helper_mftc0_tcrestart',
|
|
'helper_mftc0_tcschedule',
|
|
'helper_mftc0_tcschefback',
|
|
'helper_mftc0_tcstatus',
|
|
'helper_mftc0_vpeconf0',
|
|
'helper_mftc0_vpecontrol',
|
|
'helper_mftdsp',
|
|
'helper_mftgpr',
|
|
'helper_mfthi',
|
|
'helper_mftlo',
|
|
'helper_modsub',
|
|
'helper_msa_add_a_df',
|
|
'helper_msa_adds_a_df',
|
|
'helper_msa_adds_s_df',
|
|
'helper_msa_adds_u_df',
|
|
'helper_msa_addv_df',
|
|
'helper_msa_addvi_df',
|
|
'helper_msa_and_v',
|
|
'helper_msa_andi_b',
|
|
'helper_msa_asub_s_df',
|
|
'helper_msa_asub_u_df',
|
|
'helper_msa_ave_s_df',
|
|
'helper_msa_ave_u_df',
|
|
'helper_msa_aver_s_df',
|
|
'helper_msa_aver_u_df',
|
|
'helper_msa_bclr_df',
|
|
'helper_msa_bclri_df',
|
|
'helper_msa_binsl_df',
|
|
'helper_msa_binsli_df',
|
|
'helper_msa_binsr_df',
|
|
'helper_msa_binsri_df',
|
|
'helper_msa_bmnz_v',
|
|
'helper_msa_bmnzi_b',
|
|
'helper_msa_bmz_v',
|
|
'helper_msa_bmzi_b',
|
|
'helper_msa_bneg_df',
|
|
'helper_msa_bnegi_df',
|
|
'helper_msa_bsel_v',
|
|
'helper_msa_bseli_b',
|
|
'helper_msa_bset_df',
|
|
'helper_msa_bseti_df',
|
|
'helper_msa_ceq_df',
|
|
'helper_msa_ceqi_df',
|
|
'helper_msa_cfcmsa',
|
|
'helper_msa_cle_s_df',
|
|
'helper_msa_cle_u_df',
|
|
'helper_msa_clei_s_df',
|
|
'helper_msa_clei_u_df',
|
|
'helper_msa_clt_s_df',
|
|
'helper_msa_clt_u_df',
|
|
'helper_msa_clti_s_df',
|
|
'helper_msa_clti_u_df',
|
|
'helper_msa_copy_s_b',
|
|
'helper_msa_copy_s_d',
|
|
'helper_msa_copy_s_h',
|
|
'helper_msa_copy_s_w',
|
|
'helper_msa_copy_u_b',
|
|
'helper_msa_copy_u_h',
|
|
'helper_msa_copy_u_w',
|
|
'helper_msa_ctcmsa',
|
|
'helper_msa_div_s_df',
|
|
'helper_msa_div_u_df',
|
|
'helper_msa_dotp_s_df',
|
|
'helper_msa_dotp_u_df',
|
|
'helper_msa_dpadd_s_df',
|
|
'helper_msa_dpadd_u_df',
|
|
'helper_msa_dpsub_s_df',
|
|
'helper_msa_dpsub_u_df',
|
|
'helper_msa_fadd_df',
|
|
'helper_msa_fcaf_df',
|
|
'helper_msa_fceq_df',
|
|
'helper_msa_fclass_df',
|
|
'helper_msa_fcle_df',
|
|
'helper_msa_fclt_df',
|
|
'helper_msa_fcne_df',
|
|
'helper_msa_fcor_df',
|
|
'helper_msa_fcueq_df',
|
|
'helper_msa_fcule_df',
|
|
'helper_msa_fcult_df',
|
|
'helper_msa_fcun_df',
|
|
'helper_msa_fcune_df',
|
|
'helper_msa_fdiv_df',
|
|
'helper_msa_fexdo_df',
|
|
'helper_msa_fexp2_df',
|
|
'helper_msa_fexupl_df',
|
|
'helper_msa_fexupr_df',
|
|
'helper_msa_ffint_s_df',
|
|
'helper_msa_ffint_u_df',
|
|
'helper_msa_ffql_df',
|
|
'helper_msa_ffqr_df',
|
|
'helper_msa_fill_df',
|
|
'helper_msa_flog2_df',
|
|
'helper_msa_fmadd_df',
|
|
'helper_msa_fmax_a_df',
|
|
'helper_msa_fmax_df',
|
|
'helper_msa_fmin_a_df',
|
|
'helper_msa_fmin_df',
|
|
'helper_msa_fmsub_df',
|
|
'helper_msa_fmul_df',
|
|
'helper_msa_frcp_df',
|
|
'helper_msa_frint_df',
|
|
'helper_msa_frsqrt_df',
|
|
'helper_msa_fsaf_df',
|
|
'helper_msa_fseq_df',
|
|
'helper_msa_fsle_df',
|
|
'helper_msa_fslt_df',
|
|
'helper_msa_fsne_df',
|
|
'helper_msa_fsor_df',
|
|
'helper_msa_fsqrt_df',
|
|
'helper_msa_fsub_df',
|
|
'helper_msa_fsueq_df',
|
|
'helper_msa_fsule_df',
|
|
'helper_msa_fsult_df',
|
|
'helper_msa_fsun_df',
|
|
'helper_msa_fsune_df',
|
|
'helper_msa_ftint_s_df',
|
|
'helper_msa_ftint_u_df',
|
|
'helper_msa_ftq_df',
|
|
'helper_msa_ftrunc_s_df',
|
|
'helper_msa_ftrunc_u_df',
|
|
'helper_msa_hadd_s_df',
|
|
'helper_msa_hadd_u_df',
|
|
'helper_msa_hsub_s_df',
|
|
'helper_msa_hsub_u_df',
|
|
'helper_msa_ilvev_df',
|
|
'helper_msa_ilvl_df',
|
|
'helper_msa_ilvod_df',
|
|
'helper_msa_ilvr_df',
|
|
'helper_msa_insert_b',
|
|
'helper_msa_insert_d',
|
|
'helper_msa_insert_h',
|
|
'helper_msa_insert_w',
|
|
'helper_msa_insve_df',
|
|
'helper_msa_ld_df',
|
|
'helper_msa_ldi_df',
|
|
'helper_msa_madd_q_df',
|
|
'helper_msa_maddr_q_df',
|
|
'helper_msa_maddv_df',
|
|
'helper_msa_max_a_df',
|
|
'helper_msa_max_s_df',
|
|
'helper_msa_max_u_df',
|
|
'helper_msa_maxi_s_df',
|
|
'helper_msa_maxi_u_df',
|
|
'helper_msa_min_a_df',
|
|
'helper_msa_min_s_df',
|
|
'helper_msa_min_u_df',
|
|
'helper_msa_mini_s_df',
|
|
'helper_msa_mini_u_df',
|
|
'helper_msa_mod_s_df',
|
|
'helper_msa_mod_u_df',
|
|
'helper_msa_move_v',
|
|
'helper_msa_msub_q_df',
|
|
'helper_msa_msubr_q_df',
|
|
'helper_msa_msubv_df',
|
|
'helper_msa_mul_q_df',
|
|
'helper_msa_mulr_q_df',
|
|
'helper_msa_mulv_df',
|
|
'helper_msa_nloc_df',
|
|
'helper_msa_nlzc_df',
|
|
'helper_msa_nor_v',
|
|
'helper_msa_nori_b',
|
|
'helper_msa_or_v',
|
|
'helper_msa_ori_b',
|
|
'helper_msa_pckev_df',
|
|
'helper_msa_pckod_df',
|
|
'helper_msa_pcnt_df',
|
|
'helper_msa_sat_s_df',
|
|
'helper_msa_sat_u_df',
|
|
'helper_msa_shf_df',
|
|
'helper_msa_sld_df',
|
|
'helper_msa_sldi_df',
|
|
'helper_msa_sll_df',
|
|
'helper_msa_slli_df',
|
|
'helper_msa_splat_df',
|
|
'helper_msa_splati_df',
|
|
'helper_msa_sra_df',
|
|
'helper_msa_srai_df',
|
|
'helper_msa_srar_df',
|
|
'helper_msa_srari_df',
|
|
'helper_msa_srl_df',
|
|
'helper_msa_srli_df',
|
|
'helper_msa_srlr_df',
|
|
'helper_msa_srlri_df',
|
|
'helper_msa_st_df',
|
|
'helper_msa_subs_s_df',
|
|
'helper_msa_subs_u_df',
|
|
'helper_msa_subsus_u_df',
|
|
'helper_msa_subsuu_s_df',
|
|
'helper_msa_subv_df',
|
|
'helper_msa_subvi_df',
|
|
'helper_msa_vshf_df',
|
|
'helper_msa_xor_v',
|
|
'helper_msa_xori_b',
|
|
'helper_msac',
|
|
'helper_msachi',
|
|
'helper_msachiu',
|
|
'helper_msacu',
|
|
'helper_mtc0_cause',
|
|
'helper_mtc0_compare',
|
|
'helper_mtc0_config0',
|
|
'helper_mtc0_config2',
|
|
'helper_mtc0_config3',
|
|
'helper_mtc0_config4',
|
|
'helper_mtc0_config5',
|
|
'helper_mtc0_context',
|
|
'helper_mtc0_count',
|
|
'helper_mtc0_datahi',
|
|
'helper_mtc0_datalo',
|
|
'helper_mtc0_debug',
|
|
'helper_mtc0_ebase',
|
|
'helper_mtc0_errctl',
|
|
'helper_mtc0_entryhi',
|
|
'helper_mtc0_entrylo0',
|
|
'helper_mtc0_entrylo1',
|
|
'helper_mtc0_framemask',
|
|
'helper_mtc0_hwrena',
|
|
'helper_mtc0_index',
|
|
'helper_mtc0_intctl',
|
|
'helper_mtc0_lladdr',
|
|
'helper_mtc0_maar',
|
|
'helper_mtc0_maari',
|
|
'helper_mtc0_memorymapid',
|
|
'helper_mtc0_mvpcontrol',
|
|
'helper_mtc0_pagegrain',
|
|
'helper_mtc0_pagemask',
|
|
'helper_mtc0_performance0',
|
|
'helper_mtc0_pwctl',
|
|
'helper_mtc0_pwfield',
|
|
'helper_mtc0_pwsize',
|
|
'helper_mtc0_saar',
|
|
'helper_mtc0_saari',
|
|
'helper_mtc0_segctl0',
|
|
'helper_mtc0_segctl1',
|
|
'helper_mtc0_segctl2',
|
|
'helper_mtc0_srsconf0',
|
|
'helper_mtc0_srsconf1',
|
|
'helper_mtc0_srsconf2',
|
|
'helper_mtc0_srsconf3',
|
|
'helper_mtc0_srsconf4',
|
|
'helper_mtc0_srsctl',
|
|
'helper_mtc0_status',
|
|
'helper_mtc0_taghi',
|
|
'helper_mtc0_taglo',
|
|
'helper_mtc0_tcbind',
|
|
'helper_mtc0_tccontext',
|
|
'helper_mtc0_tchalt',
|
|
'helper_mtc0_tcrestart',
|
|
'helper_mtc0_tcschedule',
|
|
'helper_mtc0_tcschefback',
|
|
'helper_mtc0_tcstatus',
|
|
'helper_mtc0_vpeconf0',
|
|
'helper_mtc0_vpeconf1',
|
|
'helper_mtc0_vpecontrol',
|
|
'helper_mtc0_vpeopt',
|
|
'helper_mtc0_watchhi',
|
|
'helper_mtc0_watchlo',
|
|
'helper_mtc0_wired',
|
|
'helper_mtc0_xcontext',
|
|
'helper_mtc0_yqmask',
|
|
'helper_mthc0_maar',
|
|
'helper_mthc0_saar',
|
|
'helper_mthc0_watchhi',
|
|
'helper_mthlip',
|
|
'helper_mttacx',
|
|
'helper_mttc0_cause',
|
|
'helper_mttc0_debug',
|
|
'helper_mttc0_ebase',
|
|
'helper_mttc0_entryhi',
|
|
'helper_mttc0_status',
|
|
'helper_mttc0_tcbind',
|
|
'helper_mttc0_tccontext',
|
|
'helper_mttc0_tchalt',
|
|
'helper_mttc0_tcrestart',
|
|
'helper_mttc0_tcschedule',
|
|
'helper_mttc0_tcschefback',
|
|
'helper_mttc0_tcstatus',
|
|
'helper_mttc0_vpeconf0',
|
|
'helper_mttc0_vpecontrol',
|
|
'helper_mttdsp',
|
|
'helper_mttgpr',
|
|
'helper_mtthi',
|
|
'helper_mttlo',
|
|
'helper_mul_ph',
|
|
'helper_mul_s_ph',
|
|
'helper_muleq_s_pw_qhl',
|
|
'helper_muleq_s_pw_qhr',
|
|
'helper_muleq_s_w_phl',
|
|
'helper_muleq_s_w_phr',
|
|
'helper_muleu_s_ph_qbl',
|
|
'helper_muleu_s_ph_qbr',
|
|
'helper_muleu_s_qh_obl',
|
|
'helper_muleu_s_qh_obr',
|
|
'helper_mulhi',
|
|
'helper_mulhiu',
|
|
'helper_mulq_rs_ph',
|
|
'helper_mulq_rs_qh',
|
|
'helper_mulq_rs_w',
|
|
'helper_mulq_s_ph',
|
|
'helper_mulq_s_w',
|
|
'helper_muls',
|
|
'helper_mulsa_w_ph',
|
|
'helper_mulsaq_s_l_pw',
|
|
'helper_mulsaq_s_w_ph',
|
|
'helper_mulsaq_s_w_qh',
|
|
'helper_mulshi',
|
|
'helper_mulshiu',
|
|
'helper_mulsu',
|
|
'helper_packrl_ph',
|
|
'helper_packrl_pw',
|
|
'helper_packsshb',
|
|
'helper_packsswh',
|
|
'helper_packushb',
|
|
'helper_paddb',
|
|
'helper_paddh',
|
|
'helper_paddsb',
|
|
'helper_paddsh',
|
|
'helper_paddusb',
|
|
'helper_paddush',
|
|
'helper_paddw',
|
|
'helper_pasubub',
|
|
'helper_pavgb',
|
|
'helper_pavgh',
|
|
'helper_pcmpeqb',
|
|
'helper_pcmpeqh',
|
|
'helper_pcmpeqw',
|
|
'helper_pcmpgtb',
|
|
'helper_pcmpgth',
|
|
'helper_pcmpgtw',
|
|
'helper_pick_ob',
|
|
'helper_pick_ph',
|
|
'helper_pick_pw',
|
|
'helper_pick_qb',
|
|
'helper_pick_qh',
|
|
'helper_pmaddhw',
|
|
'helper_pmaxsh',
|
|
'helper_pmaxub',
|
|
'helper_pminsh',
|
|
'helper_pminub',
|
|
'helper_pmon',
|
|
'helper_pmovmskb',
|
|
'helper_pmulhh',
|
|
'helper_pmulhuh',
|
|
'helper_pmullh',
|
|
'helper_preceq_pw_qhl',
|
|
'helper_preceq_pw_qhla',
|
|
'helper_preceq_pw_qhr',
|
|
'helper_preceq_pw_qhra',
|
|
'helper_precequ_ph_qbl',
|
|
'helper_precequ_ph_qbla',
|
|
'helper_precequ_ph_qbr',
|
|
'helper_precequ_ph_qbra',
|
|
'helper_precequ_qh_obl',
|
|
'helper_precequ_qh_obla',
|
|
'helper_precequ_qh_obr',
|
|
'helper_precequ_qh_obra',
|
|
'helper_preceu_ph_qbl',
|
|
'helper_preceu_ph_qbla',
|
|
'helper_preceu_ph_qbr',
|
|
'helper_preceu_ph_qbra',
|
|
'helper_preceu_qh_obl',
|
|
'helper_preceu_qh_obla',
|
|
'helper_preceu_qh_obr',
|
|
'helper_preceu_qh_obra',
|
|
'helper_precr_ob_qh',
|
|
'helper_precr_qb_ph',
|
|
'helper_precr_sra_ph_w',
|
|
'helper_precr_sra_qh_pw',
|
|
'helper_precr_sra_r_ph_w',
|
|
'helper_precr_sra_r_qh_pw',
|
|
'helper_precrq_ob_qh',
|
|
'helper_precrq_ph_w',
|
|
'helper_precrq_pw_l',
|
|
'helper_precrq_qb_ph',
|
|
'helper_precrq_qh_pw',
|
|
'helper_precrq_rs_ph_w',
|
|
'helper_precrq_rs_qh_pw',
|
|
'helper_precrqu_s_ob_qh',
|
|
'helper_precrqu_s_qb_ph',
|
|
'helper_pshufh',
|
|
'helper_psllh',
|
|
'helper_psllw',
|
|
'helper_psrah',
|
|
'helper_psraw',
|
|
'helper_psrlh',
|
|
'helper_psrlw',
|
|
'helper_psubb',
|
|
'helper_psubh',
|
|
'helper_psubsb',
|
|
'helper_psubsh',
|
|
'helper_psubusb',
|
|
'helper_psubush',
|
|
'helper_psubw',
|
|
'helper_punpckhbh',
|
|
'helper_punpckhhw',
|
|
'helper_punpckhwd',
|
|
'helper_punpcklbh',
|
|
'helper_punpcklhw',
|
|
'helper_punpcklwd',
|
|
'helper_r6_cmp_d_af',
|
|
'helper_r6_cmp_d_eq',
|
|
'helper_r6_cmp_d_le',
|
|
'helper_r6_cmp_d_lt',
|
|
'helper_r6_cmp_d_ne',
|
|
'helper_r6_cmp_d_or',
|
|
'helper_r6_cmp_d_saf',
|
|
'helper_r6_cmp_d_seq',
|
|
'helper_r6_cmp_d_sle',
|
|
'helper_r6_cmp_d_slt',
|
|
'helper_r6_cmp_d_sne',
|
|
'helper_r6_cmp_d_sor',
|
|
'helper_r6_cmp_d_sueq',
|
|
'helper_r6_cmp_d_sule',
|
|
'helper_r6_cmp_d_sult',
|
|
'helper_r6_cmp_d_sun',
|
|
'helper_r6_cmp_d_sune',
|
|
'helper_r6_cmp_d_ueq',
|
|
'helper_r6_cmp_d_ule',
|
|
'helper_r6_cmp_d_ult',
|
|
'helper_r6_cmp_d_un',
|
|
'helper_r6_cmp_d_une',
|
|
'helper_r6_cmp_s_af',
|
|
'helper_r6_cmp_s_eq',
|
|
'helper_r6_cmp_s_le',
|
|
'helper_r6_cmp_s_lt',
|
|
'helper_r6_cmp_s_ne',
|
|
'helper_r6_cmp_s_or',
|
|
'helper_r6_cmp_s_saf',
|
|
'helper_r6_cmp_s_seq',
|
|
'helper_r6_cmp_s_sle',
|
|
'helper_r6_cmp_s_slt',
|
|
'helper_r6_cmp_s_sne',
|
|
'helper_r6_cmp_s_sor',
|
|
'helper_r6_cmp_s_sueq',
|
|
'helper_r6_cmp_s_sule',
|
|
'helper_r6_cmp_s_sult',
|
|
'helper_r6_cmp_s_sun',
|
|
'helper_r6_cmp_s_sune',
|
|
'helper_r6_cmp_s_ueq',
|
|
'helper_r6_cmp_s_ule',
|
|
'helper_r6_cmp_s_ult',
|
|
'helper_r6_cmp_s_un',
|
|
'helper_r6_cmp_s_une',
|
|
'helper_raddu_l_ob',
|
|
'helper_raddu_w_qb',
|
|
'helper_raise_exception_debug',
|
|
'helper_raise_exception_err',
|
|
'helper_rddsp',
|
|
'helper_rdhwr_cc',
|
|
'helper_rdhwr_ccres',
|
|
'helper_rdhwr_cpunum',
|
|
'helper_rdhwr_performance',
|
|
'helper_rdhwr_synci_step',
|
|
'helper_rdhwr_xnp',
|
|
'helper_rotx',
|
|
'helper_sc',
|
|
'helper_scd',
|
|
'helper_sdl',
|
|
'helper_sdm',
|
|
'helper_sdr',
|
|
'helper_shilo',
|
|
'helper_shll_ob',
|
|
'helper_shll_ph',
|
|
'helper_shll_pw',
|
|
'helper_shll_qb',
|
|
'helper_shll_qh',
|
|
'helper_shll_s_ph',
|
|
'helper_shll_s_pw',
|
|
'helper_shll_s_qh',
|
|
'helper_shll_s_w',
|
|
'helper_shra_ob',
|
|
'helper_shra_ph',
|
|
'helper_shra_pw',
|
|
'helper_shra_qb',
|
|
'helper_shra_qh',
|
|
'helper_shra_r_ob',
|
|
'helper_shra_r_ph',
|
|
'helper_shra_r_pw',
|
|
'helper_shra_r_qb',
|
|
'helper_shra_r_qh',
|
|
'helper_shra_r_w',
|
|
'helper_shrl_ob',
|
|
'helper_shrl_ph',
|
|
'helper_shrl_qb',
|
|
'helper_shrl_qh',
|
|
'helper_subq_ph',
|
|
'helper_subq_pw',
|
|
'helper_subq_qh',
|
|
'helper_subq_s_ph',
|
|
'helper_subq_s_pw',
|
|
'helper_subq_s_qh',
|
|
'helper_subq_s_w',
|
|
'helper_subqh_ph',
|
|
'helper_subqh_r_ph',
|
|
'helper_subqh_r_w',
|
|
'helper_subqh_w',
|
|
'helper_subu_ob',
|
|
'helper_subu_ph',
|
|
'helper_subu_qb',
|
|
'helper_subu_qh',
|
|
'helper_subu_s_ob',
|
|
'helper_subu_s_ph',
|
|
'helper_subu_s_qb',
|
|
'helper_subu_s_qh',
|
|
'helper_subuh_ob',
|
|
'helper_subuh_qb',
|
|
'helper_subuh_r_ob',
|
|
'helper_subuh_r_qb',
|
|
'helper_swl',
|
|
'helper_swm',
|
|
'helper_swr',
|
|
'helper_tlbinv',
|
|
'helper_tlbinvf',
|
|
'helper_tlbp',
|
|
'helper_tlbr',
|
|
'helper_tlbwi',
|
|
'helper_tlbwr',
|
|
'helper_wait',
|
|
'helper_wrdsp',
|
|
'helper_yield',
|
|
'ieee_ex_to_mips',
|
|
'ieee_rm',
|
|
'mips_cpu_do_interrupt',
|
|
'mips_cpu_do_transaction_failed',
|
|
'mips_cpu_do_unaligned_access',
|
|
'mips_cpu_exec_interrupt',
|
|
'mips_cpu_get_phys_page_debug',
|
|
'mips_cpu_list',
|
|
'mips_cpu_register_types',
|
|
'mips_cpu_tlb_fill',
|
|
'mips_defs',
|
|
'mips_defs_number',
|
|
'mips_machine_init_register_types',
|
|
'mips_reg_read',
|
|
'mips_reg_reset',
|
|
'mips_reg_write',
|
|
'mips_release',
|
|
'mips_tcg_init',
|
|
'no_mmu_map_address',
|
|
'r4k_helper_tlbinv',
|
|
'r4k_helper_tlbinvf',
|
|
'r4k_helper_tlbp',
|
|
'r4k_helper_tlbr',
|
|
'r4k_helper_tlbwi',
|
|
'r4k_helper_tlbwr',
|
|
'r4k_invalidate_tlb',
|
|
'r4k_map_address',
|
|
'sync_c0_status',
|
|
'update_pagemask',
|
|
)
|
|
|
|
|
|
riscv_symbols = (
|
|
'RISCV32_REGS_STORAGE_SIZE',
|
|
'RISCV64_REGS_STORAGE_SIZE',
|
|
'cpu_riscv_get_fflags',
|
|
'cpu_riscv_set_fflags',
|
|
'csr_read_helper',
|
|
'csr_write_helper',
|
|
'decode_insn16',
|
|
'decode_insn32',
|
|
'do_raise_exception_err',
|
|
'fclass_d_risc',
|
|
'fclass_h_risc',
|
|
'fclass_s_risc',
|
|
'gen_helper_tlb_flush',
|
|
'helper_csrrc',
|
|
'helper_csrrs',
|
|
'helper_csrrw',
|
|
'helper_fadd_d',
|
|
'helper_fadd_s',
|
|
'helper_fclass_d',
|
|
'helper_fclass_s',
|
|
'helper_fcvt_d_l',
|
|
'helper_fcvt_d_lu',
|
|
'helper_fcvt_d_s',
|
|
'helper_fcvt_d_w',
|
|
'helper_fcvt_d_wu',
|
|
'helper_fcvt_l_d',
|
|
'helper_fcvt_l_s',
|
|
'helper_fcvt_lu_d',
|
|
'helper_fcvt_lu_s',
|
|
'helper_fcvt_s_d',
|
|
'helper_fcvt_s_l',
|
|
'helper_fcvt_s_lu',
|
|
'helper_fcvt_s_w',
|
|
'helper_fcvt_s_wu',
|
|
'helper_fcvt_w_d',
|
|
'helper_fcvt_w_s',
|
|
'helper_fcvt_wu_d',
|
|
'helper_fcvt_wu_s',
|
|
'helper_fdiv_d',
|
|
'helper_fdiv_s',
|
|
'helper_feq_d',
|
|
'helper_feq_s',
|
|
'helper_fle_d',
|
|
'helper_fle_s',
|
|
'helper_flt_d',
|
|
'helper_flt_s',
|
|
'helper_fmadd_d',
|
|
'helper_fmadd_s',
|
|
'helper_fmsub_d',
|
|
'helper_fmsub_s',
|
|
'helper_fmax_d',
|
|
'helper_fmax_s',
|
|
'helper_fmin_d',
|
|
'helper_fmin_s',
|
|
'helper_fmul_d',
|
|
'helper_fmul_s',
|
|
'helper_fnmadd_d',
|
|
'helper_fnmadd_s',
|
|
'helper_fnmsub_d',
|
|
'helper_fnmsub_s',
|
|
'helper_fsqrt_d',
|
|
'helper_fsqrt_s',
|
|
'helper_fsub_d',
|
|
'helper_fsub_s',
|
|
'helper_hyp_gvma_tlb_flush',
|
|
'helper_hyp_tlb_flush',
|
|
'helper_hyp_hlvx_hu',
|
|
'helper_hyp_hlvx_wu',
|
|
'helper_mret',
|
|
'helper_tlb_flush',
|
|
'helper_set_rounding_mode',
|
|
'helper_sret',
|
|
'helper_vadd_vv_b',
|
|
'helper_vadd_vv_h',
|
|
'helper_vadd_vv_w',
|
|
'helper_vadd_vv_d',
|
|
'helper_vsub_vv_b',
|
|
'helper_vsub_vv_h',
|
|
'helper_vsub_vv_w',
|
|
'helper_vsub_vv_d',
|
|
'helper_vadd_vx_b',
|
|
'helper_vadd_vx_h',
|
|
'helper_vadd_vx_w',
|
|
'helper_vadd_vx_d',
|
|
'helper_vsub_vx_b',
|
|
'helper_vsub_vx_h',
|
|
'helper_vsub_vx_w',
|
|
'helper_vsub_vx_d',
|
|
'helper_vrsub_vx_b',
|
|
'helper_vrsub_vx_h',
|
|
'helper_vrsub_vx_w',
|
|
'helper_vrsub_vx_d',
|
|
'helper_vec_rsubs8',
|
|
'helper_vec_rsubs16',
|
|
'helper_vec_rsubs32',
|
|
'helper_vec_rsubs64',
|
|
'helper_vamoswapw_v_d',
|
|
'helper_vamoswapd_v_d',
|
|
'helper_vamoaddw_v_d',
|
|
'helper_vamoaddd_v_d',
|
|
'helper_vamoxorw_v_d',
|
|
'helper_vamoxord_v_d',
|
|
'helper_vamoandw_v_d',
|
|
'helper_vamoandd_v_d',
|
|
'helper_vamoorw_v_d',
|
|
'helper_vamoord_v_d',
|
|
'helper_vamominw_v_d',
|
|
'helper_vamomind_v_d',
|
|
'helper_vamomaxw_v_d',
|
|
'helper_vamomaxd_v_d',
|
|
'helper_vamominuw_v_d',
|
|
'helper_vamominud_v_d',
|
|
'helper_vamomaxuw_v_d',
|
|
'helper_vamomaxud_v_d',
|
|
'helper_vamoswapw_v_w',
|
|
'helper_vamoaddw_v_w',
|
|
'helper_vamoxorw_v_w',
|
|
'helper_vamoandw_v_w',
|
|
'helper_vamoorw_v_w',
|
|
'helper_vamominw_v_w',
|
|
'helper_vamomaxw_v_w',
|
|
'helper_vamominuw_v_w',
|
|
'helper_vamomaxuw_v_w',
|
|
'helper_vsetvl',
|
|
'helper_vlb_v_b',
|
|
'helper_vlb_v_b_mask',
|
|
'helper_vlb_v_h',
|
|
'helper_vlb_v_h_mask',
|
|
'helper_vlb_v_w',
|
|
'helper_vlb_v_w_mask',
|
|
'helper_vlb_v_d',
|
|
'helper_vlb_v_d_mask',
|
|
'helper_vlh_v_h',
|
|
'helper_vlh_v_h_mask',
|
|
'helper_vlh_v_w',
|
|
'helper_vlh_v_w_mask',
|
|
'helper_vlh_v_d',
|
|
'helper_vlh_v_d_mask',
|
|
'helper_vlw_v_w',
|
|
'helper_vlw_v_w_mask',
|
|
'helper_vlw_v_d',
|
|
'helper_vlw_v_d_mask',
|
|
'helper_vle_v_b',
|
|
'helper_vle_v_b_mask',
|
|
'helper_vle_v_h',
|
|
'helper_vle_v_h_mask',
|
|
'helper_vle_v_w',
|
|
'helper_vle_v_w_mask',
|
|
'helper_vle_v_d',
|
|
'helper_vle_v_d_mask',
|
|
'helper_vlbu_v_b',
|
|
'helper_vlbu_v_b_mask',
|
|
'helper_vlbu_v_h',
|
|
'helper_vlbu_v_h_mask',
|
|
'helper_vlbu_v_w',
|
|
'helper_vlbu_v_w_mask',
|
|
'helper_vlbu_v_d',
|
|
'helper_vlbu_v_d_mask',
|
|
'helper_vlhu_v_h',
|
|
'helper_vlhu_v_h_mask',
|
|
'helper_vlhu_v_w',
|
|
'helper_vlhu_v_w_mask',
|
|
'helper_vlhu_v_d',
|
|
'helper_vlhu_v_d_mask',
|
|
'helper_vlwu_v_w',
|
|
'helper_vlwu_v_w_mask',
|
|
'helper_vlwu_v_d',
|
|
'helper_vlwu_v_d_mask',
|
|
'helper_vsb_v_b',
|
|
'helper_vsb_v_b_mask',
|
|
'helper_vsb_v_h',
|
|
'helper_vsb_v_h_mask',
|
|
'helper_vsb_v_w',
|
|
'helper_vsb_v_w_mask',
|
|
'helper_vsb_v_d',
|
|
'helper_vsb_v_d_mask',
|
|
'helper_vsh_v_h',
|
|
'helper_vsh_v_h_mask',
|
|
'helper_vsh_v_w',
|
|
'helper_vsh_v_w_mask',
|
|
'helper_vsh_v_d',
|
|
'helper_vsh_v_d_mask',
|
|
'helper_vsw_v_w',
|
|
'helper_vsw_v_w_mask',
|
|
'helper_vsw_v_d',
|
|
'helper_vsw_v_d_mask',
|
|
'helper_vse_v_b',
|
|
'helper_vse_v_b_mask',
|
|
'helper_vse_v_h',
|
|
'helper_vse_v_h_mask',
|
|
'helper_vse_v_w',
|
|
'helper_vse_v_w_mask',
|
|
'helper_vse_v_d',
|
|
'helper_vse_v_d_mask',
|
|
'helper_vlsb_v_b',
|
|
'helper_vlsb_v_h',
|
|
'helper_vlsb_v_w',
|
|
'helper_vlsb_v_d',
|
|
'helper_vlsh_v_h',
|
|
'helper_vlsh_v_w',
|
|
'helper_vlsh_v_d',
|
|
'helper_vlsw_v_w',
|
|
'helper_vlsw_v_d',
|
|
'helper_vlse_v_b',
|
|
'helper_vlse_v_h',
|
|
'helper_vlse_v_w',
|
|
'helper_vlse_v_d',
|
|
'helper_vlsbu_v_b',
|
|
'helper_vlsbu_v_h',
|
|
'helper_vlsbu_v_w',
|
|
'helper_vlsbu_v_d',
|
|
'helper_vlshu_v_h',
|
|
'helper_vlshu_v_w',
|
|
'helper_vlshu_v_d',
|
|
'helper_vlswu_v_w',
|
|
'helper_vlswu_v_d',
|
|
'helper_vssb_v_b',
|
|
'helper_vssb_v_h',
|
|
'helper_vssb_v_w',
|
|
'helper_vssb_v_d',
|
|
'helper_vssh_v_h',
|
|
'helper_vssh_v_w',
|
|
'helper_vssh_v_d',
|
|
'helper_vssw_v_w',
|
|
'helper_vssw_v_d',
|
|
'helper_vsse_v_b',
|
|
'helper_vsse_v_h',
|
|
'helper_vsse_v_w',
|
|
'helper_vsse_v_d',
|
|
'helper_vlbff_v_b',
|
|
'helper_vlbff_v_h',
|
|
'helper_vlbff_v_w',
|
|
'helper_vlbff_v_d',
|
|
'helper_vlhff_v_h',
|
|
'helper_vlhff_v_w',
|
|
'helper_vlhff_v_d',
|
|
'helper_vlwff_v_w',
|
|
'helper_vlwff_v_d',
|
|
'helper_vleff_v_b',
|
|
'helper_vleff_v_h',
|
|
'helper_vleff_v_w',
|
|
'helper_vleff_v_d',
|
|
'helper_vlbuff_v_b',
|
|
'helper_vlbuff_v_h',
|
|
'helper_vlbuff_v_w',
|
|
'helper_vlbuff_v_d',
|
|
'helper_vlhuff_v_h',
|
|
'helper_vlhuff_v_w',
|
|
'helper_vlhuff_v_d',
|
|
'helper_vlwuff_v_w',
|
|
'helper_vlwuff_v_d',
|
|
'helper_vlxb_v_b',
|
|
'helper_vlxb_v_h',
|
|
'helper_vlxb_v_w',
|
|
'helper_vlxb_v_d',
|
|
'helper_vlxh_v_h',
|
|
'helper_vlxh_v_w',
|
|
'helper_vlxh_v_d',
|
|
'helper_vlxw_v_w',
|
|
'helper_vlxw_v_d',
|
|
'helper_vlxe_v_b',
|
|
'helper_vlxe_v_h',
|
|
'helper_vlxe_v_w',
|
|
'helper_vlxe_v_d',
|
|
'helper_vlxbu_v_b',
|
|
'helper_vlxbu_v_h',
|
|
'helper_vlxbu_v_w',
|
|
'helper_vlxbu_v_d',
|
|
'helper_vlxhu_v_h',
|
|
'helper_vlxhu_v_w',
|
|
'helper_vlxhu_v_d',
|
|
'helper_vlxwu_v_w',
|
|
'helper_vlxwu_v_d',
|
|
'helper_vsxb_v_b',
|
|
'helper_vsxb_v_h',
|
|
'helper_vsxb_v_w',
|
|
'helper_vsxb_v_d',
|
|
'helper_vsxh_v_h',
|
|
'helper_vsxh_v_w',
|
|
'helper_vsxh_v_d',
|
|
'helper_vsxw_v_w',
|
|
'helper_vsxw_v_d',
|
|
'helper_vsxe_v_b',
|
|
'helper_vsxe_v_h',
|
|
'helper_vsxe_v_w',
|
|
'helper_vsxe_v_d',
|
|
'helper_vwaddu_vv_b',
|
|
'helper_vwaddu_vv_h',
|
|
'helper_vwaddu_vv_w',
|
|
'helper_vwsubu_vv_b',
|
|
'helper_vwsubu_vv_h',
|
|
'helper_vwsubu_vv_w',
|
|
'helper_vwadd_vv_b',
|
|
'helper_vwadd_vv_h',
|
|
'helper_vwadd_vv_w',
|
|
'helper_vwsub_vv_b',
|
|
'helper_vwsub_vv_h',
|
|
'helper_vwsub_vv_w',
|
|
'helper_vwaddu_vx_b',
|
|
'helper_vwaddu_vx_h',
|
|
'helper_vwaddu_vx_w',
|
|
'helper_vwsubu_vx_b',
|
|
'helper_vwsubu_vx_h',
|
|
'helper_vwsubu_vx_w',
|
|
'helper_vwadd_vx_b',
|
|
'helper_vwadd_vx_h',
|
|
'helper_vwadd_vx_w',
|
|
'helper_vwsub_vx_b',
|
|
'helper_vwsub_vx_h',
|
|
'helper_vwsub_vx_w',
|
|
'helper_vwaddu_wv_b',
|
|
'helper_vwaddu_wv_h',
|
|
'helper_vwaddu_wv_w',
|
|
'helper_vwsubu_wv_b',
|
|
'helper_vwsubu_wv_h',
|
|
'helper_vwsubu_wv_w',
|
|
'helper_vwadd_wv_b',
|
|
'helper_vwadd_wv_h',
|
|
'helper_vwadd_wv_w',
|
|
'helper_vwsub_wv_b',
|
|
'helper_vwsub_wv_h',
|
|
'helper_vwsub_wv_w',
|
|
'helper_vwaddu_wx_b',
|
|
'helper_vwaddu_wx_h',
|
|
'helper_vwaddu_wx_w',
|
|
'helper_vwsubu_wx_b',
|
|
'helper_vwsubu_wx_h',
|
|
'helper_vwsubu_wx_w',
|
|
'helper_vwadd_wx_b',
|
|
'helper_vwadd_wx_h',
|
|
'helper_vwadd_wx_w',
|
|
'helper_vwsub_wx_b',
|
|
'helper_vwsub_wx_h',
|
|
'helper_vwsub_wx_w',
|
|
'helper_vadc_vvm_b',
|
|
'helper_vadc_vvm_h',
|
|
'helper_vadc_vvm_w',
|
|
'helper_vadc_vvm_d',
|
|
'helper_vsbc_vvm_b',
|
|
'helper_vsbc_vvm_h',
|
|
'helper_vsbc_vvm_w',
|
|
'helper_vsbc_vvm_d',
|
|
'helper_vmadc_vvm_b',
|
|
'helper_vmadc_vvm_h',
|
|
'helper_vmadc_vvm_w',
|
|
'helper_vmadc_vvm_d',
|
|
'helper_vmsbc_vvm_b',
|
|
'helper_vmsbc_vvm_h',
|
|
'helper_vmsbc_vvm_w',
|
|
'helper_vmsbc_vvm_d',
|
|
'helper_vadc_vxm_b',
|
|
'helper_vadc_vxm_h',
|
|
'helper_vadc_vxm_w',
|
|
'helper_vadc_vxm_d',
|
|
'helper_vsbc_vxm_b',
|
|
'helper_vsbc_vxm_h',
|
|
'helper_vsbc_vxm_w',
|
|
'helper_vsbc_vxm_d',
|
|
'helper_vmadc_vxm_b',
|
|
'helper_vmadc_vxm_h',
|
|
'helper_vmadc_vxm_w',
|
|
'helper_vmadc_vxm_d',
|
|
'helper_vmsbc_vxm_b',
|
|
'helper_vmsbc_vxm_h',
|
|
'helper_vmsbc_vxm_w',
|
|
'helper_vmsbc_vxm_d',
|
|
'helper_vand_vv_b',
|
|
'helper_vand_vv_h',
|
|
'helper_vand_vv_w',
|
|
'helper_vand_vv_d',
|
|
'helper_vor_vv_b',
|
|
'helper_vor_vv_h',
|
|
'helper_vor_vv_w',
|
|
'helper_vor_vv_d',
|
|
'helper_vxor_vv_b',
|
|
'helper_vxor_vv_h',
|
|
'helper_vxor_vv_w',
|
|
'helper_vxor_vv_d',
|
|
'helper_vand_vx_b',
|
|
'helper_vand_vx_h',
|
|
'helper_vand_vx_w',
|
|
'helper_vand_vx_d',
|
|
'helper_vor_vx_b',
|
|
'helper_vor_vx_h',
|
|
'helper_vor_vx_w',
|
|
'helper_vor_vx_d',
|
|
'helper_vxor_vx_b',
|
|
'helper_vxor_vx_h',
|
|
'helper_vxor_vx_w',
|
|
'helper_vxor_vx_d',
|
|
'helper_vsll_vv_b',
|
|
'helper_vsll_vv_h',
|
|
'helper_vsll_vv_w',
|
|
'helper_vsll_vv_d',
|
|
'helper_vsrl_vv_b',
|
|
'helper_vsrl_vv_h',
|
|
'helper_vsrl_vv_w',
|
|
'helper_vsrl_vv_d',
|
|
'helper_vsra_vv_b',
|
|
'helper_vsra_vv_h',
|
|
'helper_vsra_vv_w',
|
|
'helper_vsra_vv_d',
|
|
'helper_vsll_vx_b',
|
|
'helper_vsll_vx_h',
|
|
'helper_vsll_vx_w',
|
|
'helper_vsll_vx_d',
|
|
'helper_vsrl_vx_b',
|
|
'helper_vsrl_vx_h',
|
|
'helper_vsrl_vx_w',
|
|
'helper_vsrl_vx_d',
|
|
'helper_vsra_vx_b',
|
|
'helper_vsra_vx_h',
|
|
'helper_vsra_vx_w',
|
|
'helper_vsra_vx_d',
|
|
'helper_vminu_vv_b',
|
|
'helper_vminu_vv_h',
|
|
'helper_vminu_vv_w',
|
|
'helper_vminu_vv_d',
|
|
'helper_vmin_vv_b',
|
|
'helper_vmin_vv_h',
|
|
'helper_vmin_vv_w',
|
|
'helper_vmin_vv_d',
|
|
'helper_vmaxu_vv_b',
|
|
'helper_vmaxu_vv_h',
|
|
'helper_vmaxu_vv_w',
|
|
'helper_vmaxu_vv_d',
|
|
'helper_vmax_vv_b',
|
|
'helper_vmax_vv_h',
|
|
'helper_vmax_vv_w',
|
|
'helper_vmax_vv_d',
|
|
'helper_vminu_vx_b',
|
|
'helper_vminu_vx_h',
|
|
'helper_vminu_vx_w',
|
|
'helper_vminu_vx_d',
|
|
'helper_vmin_vx_b',
|
|
'helper_vmin_vx_h',
|
|
'helper_vmin_vx_w',
|
|
'helper_vmin_vx_d',
|
|
'helper_vmaxu_vx_b',
|
|
'helper_vmaxu_vx_h',
|
|
'helper_vmaxu_vx_w',
|
|
'helper_vmaxu_vx_d',
|
|
'helper_vmax_vx_b',
|
|
'helper_vmax_vx_h',
|
|
'helper_vmax_vx_w',
|
|
'helper_vmax_vx_d',
|
|
'helper_vmul_vv_b',
|
|
'helper_vmul_vv_h',
|
|
'helper_vmul_vv_w',
|
|
'helper_vmul_vv_d',
|
|
'helper_vmulh_vv_b',
|
|
'helper_vmulh_vv_h',
|
|
'helper_vmulh_vv_w',
|
|
'helper_vmulh_vv_d',
|
|
'helper_vmulhu_vv_b',
|
|
'helper_vmulhu_vv_h',
|
|
'helper_vmulhu_vv_w',
|
|
'helper_vmulhu_vv_d',
|
|
'helper_vmulhsu_vv_b',
|
|
'helper_vmulhsu_vv_h',
|
|
'helper_vmulhsu_vv_w',
|
|
'helper_vmulhsu_vv_d',
|
|
'helper_vmul_vx_b',
|
|
'helper_vmul_vx_h',
|
|
'helper_vmul_vx_w',
|
|
'helper_vmul_vx_d',
|
|
'helper_vmulh_vx_b',
|
|
'helper_vmulh_vx_h',
|
|
'helper_vmulh_vx_w',
|
|
'helper_vmulh_vx_d',
|
|
'helper_vmulhu_vx_b',
|
|
'helper_vmulhu_vx_h',
|
|
'helper_vmulhu_vx_w',
|
|
'helper_vmulhu_vx_d',
|
|
'helper_vmulhsu_vx_b',
|
|
'helper_vmulhsu_vx_h',
|
|
'helper_vmulhsu_vx_w',
|
|
'helper_vmulhsu_vx_d',
|
|
'helper_vmseq_vv_b',
|
|
'helper_vmseq_vv_h',
|
|
'helper_vmseq_vv_w',
|
|
'helper_vmseq_vv_d',
|
|
'helper_vmsne_vv_b',
|
|
'helper_vmsne_vv_h',
|
|
'helper_vmsne_vv_w',
|
|
'helper_vmsne_vv_d',
|
|
'helper_vmsltu_vv_b',
|
|
'helper_vmsltu_vv_h',
|
|
'helper_vmsltu_vv_w',
|
|
'helper_vmsltu_vv_d',
|
|
'helper_vmslt_vv_b',
|
|
'helper_vmslt_vv_h',
|
|
'helper_vmslt_vv_w',
|
|
'helper_vmslt_vv_d',
|
|
'helper_vmsleu_vv_b',
|
|
'helper_vmsleu_vv_h',
|
|
'helper_vmsleu_vv_w',
|
|
'helper_vmsleu_vv_d',
|
|
'helper_vmsle_vv_b',
|
|
'helper_vmsle_vv_h',
|
|
'helper_vmsle_vv_w',
|
|
'helper_vmsle_vv_d',
|
|
'helper_vmseq_vx_b',
|
|
'helper_vmseq_vx_h',
|
|
'helper_vmseq_vx_w',
|
|
'helper_vmseq_vx_d',
|
|
'helper_vmsne_vx_b',
|
|
'helper_vmsne_vx_h',
|
|
'helper_vmsne_vx_w',
|
|
'helper_vmsne_vx_d',
|
|
'helper_vmsltu_vx_b',
|
|
'helper_vmsltu_vx_h',
|
|
'helper_vmsltu_vx_w',
|
|
'helper_vmsltu_vx_d',
|
|
'helper_vmslt_vx_b',
|
|
'helper_vmslt_vx_h',
|
|
'helper_vmslt_vx_w',
|
|
'helper_vmslt_vx_d',
|
|
'helper_vmsleu_vx_b',
|
|
'helper_vmsleu_vx_h',
|
|
'helper_vmsleu_vx_w',
|
|
'helper_vmsleu_vx_d',
|
|
'helper_vmsle_vx_b',
|
|
'helper_vmsle_vx_h',
|
|
'helper_vmsle_vx_w',
|
|
'helper_vmsle_vx_d',
|
|
'helper_vmsgtu_vx_b',
|
|
'helper_vmsgtu_vx_h',
|
|
'helper_vmsgtu_vx_w',
|
|
'helper_vmsgtu_vx_d',
|
|
'helper_vmsgt_vx_b',
|
|
'helper_vmsgt_vx_h',
|
|
'helper_vmsgt_vx_w',
|
|
'helper_vmsgt_vx_d',
|
|
'helper_vdivu_vv_b',
|
|
'helper_vdivu_vv_h',
|
|
'helper_vdivu_vv_w',
|
|
'helper_vdivu_vv_d',
|
|
'helper_vdiv_vv_b',
|
|
'helper_vdiv_vv_h',
|
|
'helper_vdiv_vv_w',
|
|
'helper_vdiv_vv_d',
|
|
'helper_vremu_vv_b',
|
|
'helper_vremu_vv_h',
|
|
'helper_vremu_vv_w',
|
|
'helper_vremu_vv_d',
|
|
'helper_vrem_vv_b',
|
|
'helper_vrem_vv_h',
|
|
'helper_vrem_vv_w',
|
|
'helper_vrem_vv_d',
|
|
'helper_vdivu_vx_b',
|
|
'helper_vdivu_vx_h',
|
|
'helper_vdivu_vx_w',
|
|
'helper_vdivu_vx_d',
|
|
'helper_vdiv_vx_b',
|
|
'helper_vdiv_vx_h',
|
|
'helper_vdiv_vx_w',
|
|
'helper_vdiv_vx_d',
|
|
'helper_vremu_vx_b',
|
|
'helper_vremu_vx_h',
|
|
'helper_vremu_vx_w',
|
|
'helper_vremu_vx_d',
|
|
'helper_vrem_vx_b',
|
|
'helper_vrem_vx_h',
|
|
'helper_vrem_vx_w',
|
|
'helper_vrem_vx_d',
|
|
'helpet_vwmul_vv_b',
|
|
'helpet_vwmul_vv_h',
|
|
'helpet_vwmul_vv_w',
|
|
'helpet_vwmulu_vv_b',
|
|
'helpet_vwmulu_vv_h',
|
|
'helpet_vwmulu_vv_w',
|
|
'helpet_vwmulsu_vv_b',
|
|
'helpet_vwmulsu_vv_h',
|
|
'helpet_vwmulsu_vv_w',
|
|
'helpet_vwmul_vx_b',
|
|
'helpet_vwmul_vx_h',
|
|
'helpet_vwmul_vx_w',
|
|
'helpet_vwmulu_vx_b',
|
|
'helpet_vwmulu_vx_h',
|
|
'helpet_vwmulu_vx_w',
|
|
'helpet_vwmulsu_vx_b',
|
|
'helpet_vwmulsu_vx_h',
|
|
'helpet_vwmulsu_vx_w',
|
|
'helper_vmacc_vv_b',
|
|
'helper_vmacc_vv_h',
|
|
'helper_vmacc_vv_w',
|
|
'helper_vmacc_vv_d',
|
|
'helper_vnmsac_vv_b',
|
|
'helper_vnmsac_vv_h',
|
|
'helper_vnmsac_vv_w',
|
|
'helper_vnmsac_vv_d',
|
|
'helper_vmadd_vv_b',
|
|
'helper_vmadd_vv_h',
|
|
'helper_vmadd_vv_w',
|
|
'helper_vmadd_vv_d',
|
|
'helper_vnmsub_vv_b',
|
|
'helper_vnmsub_vv_h',
|
|
'helper_vnmsub_vv_w',
|
|
'helper_vnmsub_vv_d',
|
|
'helper_vmacc_vx_b',
|
|
'helper_vmacc_vx_h',
|
|
'helper_vmacc_vx_w',
|
|
'helper_vmacc_vx_d',
|
|
'helper_vnmsac_vx_b',
|
|
'helper_vnmsac_vx_h',
|
|
'helper_vnmsac_vx_w',
|
|
'helper_vnmsac_vx_d',
|
|
'helper_vmadd_vx_b',
|
|
'helper_vmadd_vx_h',
|
|
'helper_vmadd_vx_w',
|
|
'helper_vmadd_vx_d',
|
|
'helper_vnmsub_vx_b',
|
|
'helper_vnmsub_vx_h',
|
|
'helper_vnmsub_vx_w',
|
|
'helper_vnmsub_vx_d',
|
|
'helper_vwmaccu_vv_b',
|
|
'helper_vwmaccu_vv_h',
|
|
'helper_vwmaccu_vv_w',
|
|
'helper_vwmacc_vv_b',
|
|
'helper_vwmacc_vv_h',
|
|
'helper_vwmacc_vv_w',
|
|
'helper_vwmaccsu_vv_b',
|
|
'helper_vwmaccsu_vv_h',
|
|
'helper_vwmaccsu_vv_w',
|
|
'helper_vwmaccu_vx_b',
|
|
'helper_vwmaccu_vx_h',
|
|
'helper_vwmaccu_vx_w',
|
|
'helper_vwmacc_vx_b',
|
|
'helper_vwmacc_vx_h',
|
|
'helper_vwmacc_vx_w',
|
|
'helper_vwmaccsu_vx_b',
|
|
'helper_vwmaccsu_vx_h',
|
|
'helper_vwmaccsu_vx_w',
|
|
'helper_vwmaccus_vx_b',
|
|
'helper_vwmaccus_vx_h',
|
|
'helper_vwmaccus_vx_w',
|
|
'helper_vmerge_vvm_b',
|
|
'helper_vmerge_vvm_h',
|
|
'helper_vmerge_vvm_w',
|
|
'helper_vmerge_vvm_d',
|
|
'helper_vmerge_vxm_b',
|
|
'helper_vmerge_vxm_h',
|
|
'helper_vmerge_vxm_w',
|
|
'helper_vmerge_vxm_d',
|
|
'helper_vmv_v_v_b',
|
|
'helper_vmv_v_v_h',
|
|
'helper_vmv_v_v_w',
|
|
'helper_vmv_v_v_d',
|
|
'helper_vmv_v_x_b',
|
|
'helper_vmv_v_x_h',
|
|
'helper_vmv_v_x_w',
|
|
'helper_vmv_v_x_d',
|
|
'helper_vwmul_vv_b',
|
|
'helper_vwmul_vv_h',
|
|
'helper_vwmul_vv_w',
|
|
'helper_vwmulu_vv_b',
|
|
'helper_vwmulu_vv_h',
|
|
'helper_vwmulu_vv_w',
|
|
'helper_vwmulsu_vv_b',
|
|
'helper_vwmulsu_vv_h',
|
|
'helper_vwmulsu_vv_w',
|
|
'helper_vwmul_vx_b',
|
|
'helper_vwmul_vx_h',
|
|
'helper_vwmul_vx_w',
|
|
'helper_vwmulu_vx_b',
|
|
'helper_vwmulu_vx_h',
|
|
'helper_vwmulu_vx_w',
|
|
'helper_vwmulsu_vx_b',
|
|
'helper_vwmulsu_vx_h',
|
|
'helper_vwmulsu_vx_w',
|
|
'helper_vsaddu_vv_b',
|
|
'helper_vsaddu_vv_h',
|
|
'helper_vsaddu_vv_w',
|
|
'helper_vsaddu_vv_d',
|
|
'helper_vsadd_vv_b',
|
|
'helper_vsadd_vv_h',
|
|
'helper_vsadd_vv_w',
|
|
'helper_vsadd_vv_d',
|
|
'helper_vssubu_vv_b',
|
|
'helper_vssubu_vv_h',
|
|
'helper_vssubu_vv_w',
|
|
'helper_vssubu_vv_d',
|
|
'helper_vssub_vv_b',
|
|
'helper_vssub_vv_h',
|
|
'helper_vssub_vv_w',
|
|
'helper_vssub_vv_d',
|
|
'helper_vsaddu_vx_b',
|
|
'helper_vsaddu_vx_h',
|
|
'helper_vsaddu_vx_w',
|
|
'helper_vsaddu_vx_d',
|
|
'helper_vsadd_vx_b',
|
|
'helper_vsadd_vx_h',
|
|
'helper_vsadd_vx_w',
|
|
'helper_vsadd_vx_d',
|
|
'helper_vssubu_vx_b',
|
|
'helper_vssubu_vx_h',
|
|
'helper_vssubu_vx_w',
|
|
'helper_vssubu_vx_d',
|
|
'helper_vssub_vx_b',
|
|
'helper_vssub_vx_h',
|
|
'helper_vssub_vx_w',
|
|
'helper_vssub_vx_d',
|
|
'helper_vaadd_vv_b',
|
|
'helper_vaadd_vv_h',
|
|
'helper_vaadd_vv_w',
|
|
'helper_vaadd_vv_d',
|
|
'helper_vasub_vv_b',
|
|
'helper_vasub_vv_h',
|
|
'helper_vasub_vv_w',
|
|
'helper_vasub_vv_d',
|
|
'helper_vaadd_vx_b',
|
|
'helper_vaadd_vx_h',
|
|
'helper_vaadd_vx_w',
|
|
'helper_vaadd_vx_d',
|
|
'helper_vasub_vx_b',
|
|
'helper_vasub_vx_h',
|
|
'helper_vasub_vx_w',
|
|
'helper_vasub_vx_d',
|
|
'helper_vsmul_vv_b',
|
|
'helper_vsmul_vv_h',
|
|
'helper_vsmul_vv_w',
|
|
'helper_vsmul_vv_d',
|
|
'helper_vsmul_vx_b',
|
|
'helper_vsmul_vx_h',
|
|
'helper_vsmul_vx_w',
|
|
'helper_vsmul_vx_d',
|
|
'helper_vwsmaccu_vv_b',
|
|
'helper_vwsmaccu_vv_h',
|
|
'helper_vwsmaccu_vv_w',
|
|
'helper_vwsmacc_vv_b',
|
|
'helper_vwsmacc_vv_h',
|
|
'helper_vwsmacc_vv_w',
|
|
'helper_vwsmaccsu_vv_b',
|
|
'helper_vwsmaccsu_vv_h',
|
|
'helper_vwsmaccsu_vv_w',
|
|
'helper_vwsmaccu_vx_b',
|
|
'helper_vwsmaccu_vx_h',
|
|
'helper_vwsmaccu_vx_w',
|
|
'helper_vwsmacc_vx_b',
|
|
'helper_vwsmacc_vx_h',
|
|
'helper_vwsmacc_vx_w',
|
|
'helper_vwsmaccsu_vx_b',
|
|
'helper_vwsmaccsu_vx_h',
|
|
'helper_vwsmaccsu_vx_w',
|
|
'helper_vwsmaccus_vx_b',
|
|
'helper_vwsmaccus_vx_h',
|
|
'helper_vwsmaccus_vx_w',
|
|
'helper_vssrl_vv_b',
|
|
'helper_vssrl_vv_h',
|
|
'helper_vssrl_vv_w',
|
|
'helper_vssrl_vv_d',
|
|
'helper_vssra_vv_b',
|
|
'helper_vssra_vv_h',
|
|
'helper_vssra_vv_w',
|
|
'helper_vssra_vv_d',
|
|
'helper_vssrl_vx_b',
|
|
'helper_vssrl_vx_h',
|
|
'helper_vssrl_vx_w',
|
|
'helper_vssrl_vx_d',
|
|
'helper_vssra_vx_b',
|
|
'helper_vssra_vx_h',
|
|
'helper_vssra_vx_w',
|
|
'helper_vssra_vx_d',
|
|
'helper_vnclip_vv_b',
|
|
'helper_vnclip_vv_h',
|
|
'helper_vnclip_vv_w',
|
|
'helper_vnclipu_vv_b',
|
|
'helper_vnclipu_vv_h',
|
|
'helper_vnclipu_vv_w',
|
|
'helper_vnclipu_vx_b',
|
|
'helper_vnclipu_vx_h',
|
|
'helper_vnclipu_vx_w',
|
|
'helper_vnclip_vx_b',
|
|
'helper_vnclip_vx_h',
|
|
'helper_vnclip_vx_w',
|
|
'helper_vfadd_vv_h',
|
|
'helper_vfadd_vv_w',
|
|
'helper_vfadd_vv_d',
|
|
'helper_vfsub_vv_h',
|
|
'helper_vfsub_vv_w',
|
|
'helper_vfsub_vv_d',
|
|
'helper_vfadd_vf_h',
|
|
'helper_vfadd_vf_w',
|
|
'helper_vfadd_vf_d',
|
|
'helper_vfsub_vf_h',
|
|
'helper_vfsub_vf_w',
|
|
'helper_vfsub_vf_d',
|
|
'helper_vfrsub_vf_h',
|
|
'helper_vfrsub_vf_w',
|
|
'helper_vfrsub_vf_d',
|
|
'helper_vnsrl_vv_b',
|
|
'helper_vnsrl_vv_h',
|
|
'helper_vnsrl_vv_w',
|
|
'helper_vnsra_vv_b',
|
|
'helper_vnsra_vv_h',
|
|
'helper_vnsra_vv_w',
|
|
'helper_vnsrl_vx_b',
|
|
'helper_vnsrl_vx_h',
|
|
'helper_vnsrl_vx_w',
|
|
'helper_vnsra_vx_b',
|
|
'helper_vnsra_vx_h',
|
|
'helper_vnsra_vx_w',
|
|
'helper_vfwadd_vv_h',
|
|
'helper_vfwadd_vv_w',
|
|
'helper_vfwsub_vv_h',
|
|
'helper_vfwsub_vv_w',
|
|
'helper_vfwadd_wv_h',
|
|
'helper_vfwadd_wv_w',
|
|
'helper_vfwsub_wv_h',
|
|
'helper_vfwsub_wv_w',
|
|
'helper_vfwadd_vf_h',
|
|
'helper_vfwadd_vf_w',
|
|
'helper_vfwsub_vf_h',
|
|
'helper_vfwsub_vf_w',
|
|
'helper_vfwadd_wf_h',
|
|
'helper_vfwadd_wf_w',
|
|
'helper_vfwsub_wf_h',
|
|
'helper_vfwsub_wf_w',
|
|
'helper_vfmul_vv_h',
|
|
'helper_vfmul_vv_w',
|
|
'helper_vfmul_vv_d',
|
|
'helper_vfdiv_vv_h',
|
|
'helper_vfdiv_vv_w',
|
|
'helper_vfdiv_vv_d',
|
|
'helper_vfmul_vf_h',
|
|
'helper_vfmul_vf_w',
|
|
'helper_vfmul_vf_d',
|
|
'helper_vfdiv_vf_h',
|
|
'helper_vfdiv_vf_w',
|
|
'helper_vfdiv_vf_d',
|
|
'helper_vfrdiv_vf_h',
|
|
'helper_vfrdiv_vf_w',
|
|
'helper_vfrdiv_vf_d',
|
|
'helper_vfwmul_vv_h',
|
|
'helper_vfwmul_vv_w',
|
|
'helper_vfwmul_vf_h',
|
|
'helper_vfwmul_vf_w',
|
|
'helper_vfmacc_vv_h',
|
|
'helper_vfmacc_vv_w',
|
|
'helper_vfmacc_vv_d',
|
|
'helper_vfnmacc_vv_h',
|
|
'helper_vfnmacc_vv_w',
|
|
'helper_vfnmacc_vv_d',
|
|
'helper_vfmsac_vv_h',
|
|
'helper_vfmsac_vv_w',
|
|
'helper_vfmsac_vv_d',
|
|
'helper_vfnmsac_vv_h',
|
|
'helper_vfnmsac_vv_w',
|
|
'helper_vfnmsac_vv_d',
|
|
'helper_vfmadd_vv_h',
|
|
'helper_vfmadd_vv_w',
|
|
'helper_vfmadd_vv_d',
|
|
'helper_vfnmadd_vv_h',
|
|
'helper_vfnmadd_vv_w',
|
|
'helper_vfnmadd_vv_d',
|
|
'helper_vfmsub_vv_h',
|
|
'helper_vfmsub_vv_w',
|
|
'helper_vfmsub_vv_d',
|
|
'helper_vfnmsub_vv_h',
|
|
'helper_vfnmsub_vv_w',
|
|
'helper_vfnmsub_vv_d',
|
|
'helper_vfmacc_vf_h',
|
|
'helper_vfmacc_vf_w',
|
|
'helper_vfmacc_vf_d',
|
|
'helper_vfnmacc_vf_h',
|
|
'helper_vfnmacc_vf_w',
|
|
'helper_vfnmacc_vf_d',
|
|
'helper_vfmsac_vf_h',
|
|
'helper_vfmsac_vf_w',
|
|
'helper_vfmsac_vf_d',
|
|
'helper_vfnmsac_vf_h',
|
|
'helper_vfnmsac_vf_w',
|
|
'helper_vfnmsac_vf_d',
|
|
'helper_vfmadd_vf_h',
|
|
'helper_vfmadd_vf_w',
|
|
'helper_vfmadd_vf_d',
|
|
'helper_vfnmadd_vf_h',
|
|
'helper_vfnmadd_vf_w',
|
|
'helper_vfnmadd_vf_d',
|
|
'helper_vfmsub_vf_h',
|
|
'helper_vfmsub_vf_w',
|
|
'helper_vfmsub_vf_d',
|
|
'helper_vfnmsub_vf_h',
|
|
'helper_vfnmsub_vf_w',
|
|
'helper_vfnmsub_vf_d',
|
|
'helper_vfwmacc_vv_h',
|
|
'helper_vfwmacc_vv_w',
|
|
'helper_vfwnmacc_vv_h',
|
|
'helper_vfwnmacc_vv_w',
|
|
'helper_vfwmsac_vv_h',
|
|
'helper_vfwmsac_vv_w',
|
|
'helper_vfwnmsac_vv_h',
|
|
'helper_vfwnmsac_vv_w',
|
|
'helper_vfwmacc_vf_h',
|
|
'helper_vfwmacc_vf_w',
|
|
'helper_vfwnmacc_vf_h',
|
|
'helper_vfwnmacc_vf_w',
|
|
'helper_vfwmsac_vf_h',
|
|
'helper_vfwmsac_vf_w',
|
|
'helper_vfwnmsac_vf_h',
|
|
'helper_vfwnmsac_vf_w',
|
|
'helper_vfsqrt_v_h',
|
|
'helper_vfsqrt_v_w',
|
|
'helper_vfsqrt_v_d',
|
|
'helper_vfmin_vv_h',
|
|
'helper_vfmin_vv_w',
|
|
'helper_vfmin_vv_d',
|
|
'helper_vfmax_vv_h',
|
|
'helper_vfmax_vv_w',
|
|
'helper_vfmax_vv_d',
|
|
'helper_vfmin_vf_h',
|
|
'helper_vfmin_vf_w',
|
|
'helper_vfmin_vf_d',
|
|
'helper_vfmax_vf_h',
|
|
'helper_vfmax_vf_w',
|
|
'helper_vfmax_vf_d',
|
|
'helper_vfsgnj_vv_h',
|
|
'helper_vfsgnj_vv_w',
|
|
'helper_vfsgnj_vv_d',
|
|
'helper_vfsgnjn_vv_h',
|
|
'helper_vfsgnjn_vv_w',
|
|
'helper_vfsgnjn_vv_d',
|
|
'helper_vfsgnjx_vv_h',
|
|
'helper_vfsgnjx_vv_w',
|
|
'helper_vfsgnjx_vv_d',
|
|
'helper_vfsgnj_vf_h',
|
|
'helper_vfsgnj_vf_w',
|
|
'helper_vfsgnj_vf_d',
|
|
'helper_vfsgnjn_vf_h',
|
|
'helper_vfsgnjn_vf_w',
|
|
'helper_vfsgnjn_vf_d',
|
|
'helper_vfsgnjx_vf_h',
|
|
'helper_vfsgnjx_vf_w',
|
|
'helper_vfsgnjx_vf_d',
|
|
'helper_vmfeq_vv_h',
|
|
'helper_vmfeq_vv_w',
|
|
'helper_vmfeq_vv_d',
|
|
'helper_vmfne_vv_h',
|
|
'helper_vmfne_vv_w',
|
|
'helper_vmfne_vv_d',
|
|
'helper_vmflt_vv_h',
|
|
'helper_vmflt_vv_w',
|
|
'helper_vmflt_vv_d',
|
|
'helper_vmfle_vv_h',
|
|
'helper_vmfle_vv_w',
|
|
'helper_vmfle_vv_d',
|
|
'helper_vmfeq_vf_h',
|
|
'helper_vmfeq_vf_w',
|
|
'helper_vmfeq_vf_d',
|
|
'helper_vmfne_vf_h',
|
|
'helper_vmfne_vf_w',
|
|
'helper_vmfne_vf_d',
|
|
'helper_vmflt_vf_h',
|
|
'helper_vmflt_vf_w',
|
|
'helper_vmflt_vf_d',
|
|
'helper_vmfle_vf_h',
|
|
'helper_vmfle_vf_w',
|
|
'helper_vmfle_vf_d',
|
|
'helper_vmfgt_vf_h',
|
|
'helper_vmfgt_vf_w',
|
|
'helper_vmfgt_vf_d',
|
|
'helper_vmfge_vf_h',
|
|
'helper_vmfge_vf_w',
|
|
'helper_vmfge_vf_d',
|
|
'helper_vmford_vv_h',
|
|
'helper_vmford_vv_w',
|
|
'helper_vmford_vv_d',
|
|
'helper_vmford_vf_h',
|
|
'helper_vmford_vf_w',
|
|
'helper_vmford_vf_d',
|
|
'helper_vfclass_v_h',
|
|
'helper_vfclass_v_w',
|
|
'helper_vfclass_v_d',
|
|
'helper_vfmerge_vfm_h',
|
|
'helper_vfmerge_vfm_w',
|
|
'helper_vfmerge_vfm_d',
|
|
'helper_vfcvt_xu_f_v_h',
|
|
'helper_vfcvt_xu_f_v_w',
|
|
'helper_vfcvt_xu_f_v_d',
|
|
'helper_vfcvt_x_f_v_h',
|
|
'helper_vfcvt_x_f_v_w',
|
|
'helper_vfcvt_x_f_v_d',
|
|
'helper_vfcvt_f_xu_v_h',
|
|
'helper_vfcvt_f_xu_v_w',
|
|
'helper_vfcvt_f_xu_v_d',
|
|
'helper_vfcvt_f_x_v_h',
|
|
'helper_vfcvt_f_x_v_w',
|
|
'helper_vfcvt_f_x_v_d',
|
|
'helper_vfwcvt_xu_f_v_h',
|
|
'helper_vfwcvt_xu_f_v_w',
|
|
'helper_vfwcvt_x_f_v_h',
|
|
'helper_vfwcvt_x_f_v_w',
|
|
'helper_vfwcvt_f_xu_v_h',
|
|
'helper_vfwcvt_f_xu_v_w',
|
|
'helper_vfwcvt_f_x_v_h',
|
|
'helper_vfwcvt_f_x_v_w',
|
|
'helper_vfwcvt_f_f_v_h',
|
|
'helper_vfwcvt_f_f_v_w',
|
|
'helper_vfncvt_xu_f_v_h',
|
|
'helper_vfncvt_xu_f_v_w',
|
|
'helper_vfncvt_x_f_v_h',
|
|
'helper_vfncvt_x_f_v_w',
|
|
'helper_vfncvt_f_xu_v_h',
|
|
'helper_vfncvt_f_xu_v_w',
|
|
'helper_vfncvt_f_x_v_h',
|
|
'helper_vfncvt_f_x_v_w',
|
|
'helper_vfncvt_f_f_v_h',
|
|
'helper_vfncvt_f_f_v_w',
|
|
'helper_vredsum_vs_b',
|
|
'helper_vredsum_vs_h',
|
|
'helper_vredsum_vs_w',
|
|
'helper_vredsum_vs_d',
|
|
'helper_vredmaxu_vs_b',
|
|
'helper_vredmaxu_vs_h',
|
|
'helper_vredmaxu_vs_w',
|
|
'helper_vredmaxu_vs_d',
|
|
'helper_vredmax_vs_b',
|
|
'helper_vredmax_vs_h',
|
|
'helper_vredmax_vs_w',
|
|
'helper_vredmax_vs_d',
|
|
'helper_vredminu_vs_b',
|
|
'helper_vredminu_vs_h',
|
|
'helper_vredminu_vs_w',
|
|
'helper_vredminu_vs_d',
|
|
'helper_vredmin_vs_b',
|
|
'helper_vredmin_vs_h',
|
|
'helper_vredmin_vs_w',
|
|
'helper_vredmin_vs_d',
|
|
'helper_vredand_vs_b',
|
|
'helper_vredand_vs_h',
|
|
'helper_vredand_vs_w',
|
|
'helper_vredand_vs_d',
|
|
'helper_vredor_vs_b',
|
|
'helper_vredor_vs_h',
|
|
'helper_vredor_vs_w',
|
|
'helper_vredor_vs_d',
|
|
'helper_vredxor_vs_b',
|
|
'helper_vredxor_vs_h',
|
|
'helper_vredxor_vs_w',
|
|
'helper_vredxor_vs_d',
|
|
'helper_vwredsumu_vs_b',
|
|
'helper_vwredsumu_vs_h',
|
|
'helper_vwredsumu_vs_w',
|
|
'helper_vwredsum_vs_b',
|
|
'helper_vwredsum_vs_h',
|
|
'helper_vwredsum_vs_w',
|
|
'helper_vfredsum_vs_h',
|
|
'helper_vfredsum_vs_w',
|
|
'helper_vfredsum_vs_d',
|
|
'helper_vfredmax_vs_h',
|
|
'helper_vfredmax_vs_w',
|
|
'helper_vfredmax_vs_d',
|
|
'helper_vfredmin_vs_h',
|
|
'helper_vfredmin_vs_w',
|
|
'helper_vfredmin_vs_d',
|
|
'helper_vfwredsum_vs_h',
|
|
'helper_vfwredsum_vs_w',
|
|
'helper_vmand_mm',
|
|
'helper_vmnand_mm',
|
|
'helper_vmandnot_mm',
|
|
'helper_vmxor_mm',
|
|
'helper_vmor_mm',
|
|
'helper_vmnor_mm',
|
|
'helper_vmornot_mm',
|
|
'helper_vmxnor_mm',
|
|
'helper_vmpopc_m',
|
|
'helper_vmfirst_m',
|
|
'helper_vmsbf_m',
|
|
'helper_vmsif_m',
|
|
'helper_vmsof_m',
|
|
'helper_viota_m_b',
|
|
'helper_viota_m_h',
|
|
'helper_viota_m_w',
|
|
'helper_viota_m_d',
|
|
'helper_vid_v_b',
|
|
'helper_vid_v_h',
|
|
'helper_vid_v_w',
|
|
'helper_vid_v_d',
|
|
'helper_vslideup_vx_b',
|
|
'helper_vslideup_vx_h',
|
|
'helper_vslideup_vx_w',
|
|
'helper_vslideup_vx_d',
|
|
'helper_vslidedown_vx_b',
|
|
'helper_vslidedown_vx_h',
|
|
'helper_vslidedown_vx_w',
|
|
'helper_vslidedown_vx_d',
|
|
'helper_vslide1up_vx_b',
|
|
'helper_vslide1up_vx_h',
|
|
'helper_vslide1up_vx_w',
|
|
'helper_vslide1up_vx_d',
|
|
'helper_vslide1down_vx_b',
|
|
'helper_vslide1down_vx_h',
|
|
'helper_vslide1down_vx_w',
|
|
'helper_vslide1down_vx_d',
|
|
'helper_vrgather_vv_b',
|
|
'helper_vrgather_vv_h',
|
|
'helper_vrgather_vv_w',
|
|
'helper_vrgather_vv_d',
|
|
'helper_vrgather_vx_b',
|
|
'helper_vrgather_vx_h',
|
|
'helper_vrgather_vx_w',
|
|
'helper_vrgather_vx_d',
|
|
'helper_vcompress_vm_b',
|
|
'helper_vcompress_vm_h',
|
|
'helper_vcompress_vm_w',
|
|
'helper_vcompress_vm_d',
|
|
'pmp_hart_has_privs',
|
|
'pmp_get_num_rules',
|
|
'pmp_is_range_in_tlb',
|
|
'pmp_update_rule_nums',
|
|
'pmpaddr_csr_read',
|
|
'pmpaddr_csr_write',
|
|
'pmpcfg_csr_read',
|
|
'pmpcfg_csr_write',
|
|
'riscv_cpu_claim_interrupts',
|
|
'riscv_cpu_do_interrupt',
|
|
'riscv_cpu_do_unaligned_access',
|
|
'riscv_cpu_exec_interrupt',
|
|
'riscv_cpu_force_hs_excep_enabled',
|
|
'riscv_cpu_fp_enabled',
|
|
'riscv_cpu_get_fflags',
|
|
'riscv_cpu_get_phys_page_debug',
|
|
'riscv_cpu_is_32bit',
|
|
'riscv_cpu_list',
|
|
'riscv_cpu_mmu_index',
|
|
'riscv_cpu_register_types',
|
|
'riscv_cpu_set_fflags',
|
|
'riscv_cpu_set_force_hs_excep',
|
|
'riscv_cpu_set_mode',
|
|
'riscv_cpu_set_rdtime_fn',
|
|
'riscv_cpu_set_virt_enabled',
|
|
'riscv_cpu_swap_hypervisor_regs',
|
|
'riscv_cpu_tlb_fill',
|
|
'riscv_cpu_two_stage_lookup',
|
|
'riscv_cpu_unassigned_access',
|
|
'riscv_cpu_update_mip',
|
|
'riscv_cpu_virt_enabled',
|
|
'riscv_csrrw',
|
|
'riscv_csrrw_debug',
|
|
'riscv_excp_names',
|
|
'riscv_fpr_regnames',
|
|
'riscv_get_csr_ops',
|
|
'riscv_int_regnames',
|
|
'riscv_intr_names',
|
|
'riscv_raise_exception',
|
|
'riscv_set_csr_ops',
|
|
'riscv_set_local_interrupt',
|
|
'riscv_set_mode',
|
|
'riscv_translate_init',
|
|
'spike_v1_10_0_machine_init_register_types',
|
|
)
|
|
|
|
sparc_symbols = (
|
|
'cpu_cwp_dec',
|
|
'cpu_cwp_inc',
|
|
'cpu_get_psr',
|
|
'cpu_mmu_index',
|
|
'cpu_put_psr',
|
|
'cpu_put_psr_raw',
|
|
'cpu_raise_exception_ra',
|
|
'cpu_set_cwp',
|
|
'cpu_sparc_exec',
|
|
'cpu_sparc_set_id',
|
|
'dump_mmu',
|
|
'helper_check_align',
|
|
'helper_check_ieee_exceptions',
|
|
'helper_compute_C_icc',
|
|
'helper_compute_psr',
|
|
'helper_debug',
|
|
'helper_fabss',
|
|
'helper_faddd',
|
|
'helper_faddq',
|
|
'helper_fadds',
|
|
'helper_fcmpd',
|
|
'helper_fcmped',
|
|
'helper_fcmpeq',
|
|
'helper_fcmpes',
|
|
'helper_fcmpq',
|
|
'helper_fcmps',
|
|
'helper_fdivd',
|
|
'helper_fdivq',
|
|
'helper_fdivs',
|
|
'helper_fdmulq',
|
|
'helper_fdtoi',
|
|
'helper_fdtoq',
|
|
'helper_fdtos',
|
|
'helper_fitod',
|
|
'helper_fitoq',
|
|
'helper_fitos',
|
|
'helper_fmuld',
|
|
'helper_fmulq',
|
|
'helper_fmuls',
|
|
'helper_fnegs',
|
|
'helper_fqtod',
|
|
'helper_fqtoi',
|
|
'helper_fqtos',
|
|
'helper_fsmuld',
|
|
'helper_fsqrtd',
|
|
'helper_fsqrtq',
|
|
'helper_fsqrts',
|
|
'helper_fstod',
|
|
'helper_fstoi',
|
|
'helper_fstoq',
|
|
'helper_fsubd',
|
|
'helper_fsubq',
|
|
'helper_fsubs',
|
|
'helper_ld_asi',
|
|
'helper_ldfsr',
|
|
'helper_restore',
|
|
'helper_save',
|
|
'helper_sdiv_cc',
|
|
'helper_st_asi',
|
|
'helper_taddcctv',
|
|
'helper_tsubcctv',
|
|
'helper_udiv_cc',
|
|
'helper_wrgl',
|
|
'sparc_cpu_do_interrupt',
|
|
'sparc_cpu_do_transaction_failed',
|
|
'sparc_cpu_do_unaligned_access',
|
|
'sparc_cpu_get_phys_page_debug',
|
|
'sparc_cpu_register_types',
|
|
'sparc_cpu_tlb_fill',
|
|
'sparc_reg_read',
|
|
'sparc_reg_reset',
|
|
'sparc_reg_write',
|
|
'sparc_tcg_init',
|
|
)
|
|
|
|
x86_64_symbols = (
|
|
'cpu_mmu_index',
|
|
'gen_helper_raise_exception',
|
|
'raise_exception',
|
|
)
|
|
|
|
|
|
if __name__ == '__main__':
|
|
arch = sys.argv[1]
|
|
|
|
print("/* Autogen header for Unicorn Engine - DONOT MODIFY */")
|
|
print("#ifndef UNICORN_AUTOGEN_%s_H" %arch.upper())
|
|
print("#define UNICORN_AUTOGEN_%s_H" %arch.upper())
|
|
|
|
for s in symbols:
|
|
print("#define %s %s_%s" %(s, s, arch))
|
|
|
|
if 'arm' in arch:
|
|
for s in arm_symbols:
|
|
print("#define %s %s_%s" %(s, s, arch))
|
|
|
|
if 'aarch64' in arch:
|
|
for s in aarch64_symbols:
|
|
print("#define %s %s_%s" %(s, s, arch))
|
|
|
|
if 'm68k' in arch:
|
|
for s in m68k_symbols:
|
|
print("#define %s %s_%s" %(s, s, arch))
|
|
|
|
if 'mips' in arch:
|
|
for s in mips_symbols:
|
|
print("#define %s %s_%s" %(s, s, arch))
|
|
|
|
if 'riscv' in arch:
|
|
for s in riscv_symbols:
|
|
print("#define %s %s_%s" %(s, s, arch))
|
|
|
|
if 'sparc' in arch:
|
|
for s in sparc_symbols:
|
|
print("#define %s %s_%s" %(s, s, arch))
|
|
|
|
if 'x86_64' in arch:
|
|
for s in x86_64_symbols:
|
|
print("#define %s %s_%s" %(s, s, arch))
|
|
|
|
print("#endif")
|
|
|