mirror of
https://github.com/yuzu-emu/unicorn.git
synced 2024-10-20 07:38:22 +02:00
97 lines
3.1 KiB
C
97 lines
3.1 KiB
C
/* Unicorn Emulator Engine */
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/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2015 */
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#include "hw/boards.h"
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#include "hw/sparc/sparc.h"
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#include "sysemu/cpus.h"
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#include "unicorn.h"
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#include "cpu.h"
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#define READ_QWORD(x) ((uint64)x)
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#define READ_DWORD(x) (x & 0xffffffff)
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#define READ_WORD(x) (x & 0xffff)
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#define READ_BYTE_H(x) ((x & 0xffff) >> 8)
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#define READ_BYTE_L(x) (x & 0xff)
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void sparc_reg_reset(struct uc_struct *uc)
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{
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CPUArchState *env = first_cpu->env_ptr;
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memset(env->gregs, 0, sizeof(env->gregs));
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memset(env->fpr, 0, sizeof(env->fpr));
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memset(env->regbase, 0, sizeof(env->regbase));
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env->pc = 0;
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env->npc = 0;
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env->regwptr = env->regbase;
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}
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int sparc_reg_read(struct uc_struct *uc, unsigned int regid, void *value)
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{
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CPUState *mycpu = first_cpu;
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if (regid >= UC_SPARC_REG_G0 && regid <= UC_SPARC_REG_G7)
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*(int64_t *)value = SPARC_CPU(uc, mycpu)->env.gregs[regid - UC_SPARC_REG_G0];
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else if (regid >= UC_SPARC_REG_O0 && regid <= UC_SPARC_REG_O7)
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*(int64_t *)value = SPARC_CPU(uc, mycpu)->env.regwptr[regid - UC_SPARC_REG_O0];
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else if (regid >= UC_SPARC_REG_L0 && regid <= UC_SPARC_REG_L7)
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*(int64_t *)value = SPARC_CPU(uc, mycpu)->env.regwptr[8 + regid - UC_SPARC_REG_L0];
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else if (regid >= UC_SPARC_REG_I0 && regid <= UC_SPARC_REG_I7)
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*(int64_t *)value = SPARC_CPU(uc, mycpu)->env.regwptr[16 + regid - UC_SPARC_REG_I0];
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else {
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switch(regid) {
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default: break;
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case UC_SPARC_REG_PC:
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*(int64_t *)value = SPARC_CPU(uc, mycpu)->env.pc;
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break;
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}
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}
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return 0;
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}
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#define WRITE_DWORD(x, w) (x = (x & ~0xffffffff) | (w & 0xffffffff))
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#define WRITE_WORD(x, w) (x = (x & ~0xffff) | (w & 0xffff))
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#define WRITE_BYTE_H(x, b) (x = (x & ~0xff00) | (b & 0xff))
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#define WRITE_BYTE_L(x, b) (x = (x & ~0xff) | (b & 0xff))
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int sparc_reg_write(struct uc_struct *uc, unsigned int regid, const void *value)
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{
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CPUState *mycpu = first_cpu;
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if (regid >= UC_SPARC_REG_G0 && regid <= UC_SPARC_REG_G7)
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SPARC_CPU(uc, mycpu)->env.gregs[regid - UC_SPARC_REG_G0] = *(uint64_t *)value;
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else if (regid >= UC_SPARC_REG_O0 && regid <= UC_SPARC_REG_O7)
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SPARC_CPU(uc, mycpu)->env.regwptr[regid - UC_SPARC_REG_O0] = *(uint64_t *)value;
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else if (regid >= UC_SPARC_REG_L0 && regid <= UC_SPARC_REG_L7)
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SPARC_CPU(uc, mycpu)->env.regwptr[8 + regid - UC_SPARC_REG_L0] = *(uint64_t *)value;
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else if (regid >= UC_SPARC_REG_I0 && regid <= UC_SPARC_REG_I7)
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SPARC_CPU(uc, mycpu)->env.regwptr[16 + regid - UC_SPARC_REG_I0] = *(uint64_t *)value;
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else {
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switch(regid) {
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default: break;
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case UC_SPARC_REG_PC:
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SPARC_CPU(uc, mycpu)->env.pc = *(uint64_t *)value;
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SPARC_CPU(uc, mycpu)->env.npc = *(uint64_t *)value + 8;
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break;
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}
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}
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return 0;
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}
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__attribute__ ((visibility ("default")))
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void sparc64_uc_init(struct uc_struct* uc)
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{
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register_accel_types(uc);
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sparc_cpu_register_types(uc);
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sun4u_machine_init(uc);
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uc->reg_read = sparc_reg_read;
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uc->reg_write = sparc_reg_write;
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uc->reg_reset = sparc_reg_reset;
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}
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