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f4ae64e78a
The architecture requires that for an exception return to AArch32 the low bits of ELR_ELx are ignored when the PC is set from them: * if returning to Thumb mode, ignore ELR_ELx[0] * if returning to ARM mode, ignore ELR_ELx[1:0] We were only squashing bit 0; also squash bit 1 if the SPSR T bit indicates this is a return to ARM code. Backports commit c1e0371442bf3a7e42ad53c2a3d816ed7099f81d from qemu |
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arm_ldst.h | ||
cpu64.c | ||
cpu-qom.h | ||
cpu.c | ||
cpu.h | ||
crypto_helper.c | ||
helper-a64.c | ||
helper-a64.h | ||
helper.c | ||
helper.h | ||
internals.h | ||
iwmmxt_helper.c | ||
kvm-consts.h | ||
Makefile.objs | ||
neon_helper.c | ||
op_addsub.h | ||
op_helper.c | ||
psci.c | ||
translate-a64.c | ||
translate.c | ||
translate.h | ||
unicorn_aarch64.c | ||
unicorn_arm.c | ||
unicorn.h |