Lioncash a2e7d86ccf tcg/mips: Support r6 SEL{NE, EQ}Z instead of MOVN/MOVZ ... Extend MIPS movcond implementation to support the SELNEZ/SELEQZ instructions introduced in MIPS r6 (where MOVN/MOVZ have been removed). Whereas the "MOVN/MOVZ rd, rs, rt" instructions have the following semantics: rd = [!]rt ? rs : rd The "SELNEZ/SELEQZ rd, rs, rt" instructions are slightly different: rd = [!]rt ? rs : 0 First we ensure that if one of the movcond input values is zero that it comes last (we can swap the input arguments if we invert the condition). This is so that it can exactly match one of the SELNEZ/SELEQZ instructions and avoid the need to emit the other one. Otherwise we emit the opposite instruction first into a temporary register, and OR that into the result: SELNEZ/SELEQZ TMP1, v2, c1 SELEQZ/SELNEZ ret, v1, c1 OR ret, ret, TMP1 Which does the following: ret = cond ? v1 : v2 Backports commit 137d63902faf4960081856db9242cbaf234a23af from qemu		2018-02-17 15:24:04 -05:00
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tcg-target.c	tcg/mips: Support r6 SEL{NE, EQ}Z instead of MOVN/MOVZ	2018-02-17 15:24:04 -05:00
tcg-target.h	tcg/mips: Support r6 multiply/divide encodings	2018-02-17 15:24:04 -05:00